JPS5641585A - Memory - Google Patents

Memory

Info

Publication number
JPS5641585A
JPS5641585A JP11502079A JP11502079A JPS5641585A JP S5641585 A JPS5641585 A JP S5641585A JP 11502079 A JP11502079 A JP 11502079A JP 11502079 A JP11502079 A JP 11502079A JP S5641585 A JPS5641585 A JP S5641585A
Authority
JP
Japan
Prior art keywords
electric power
inverter
functions
ram
rom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11502079A
Other languages
Japanese (ja)
Inventor
Sadahiro Yasuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11502079A priority Critical patent/JPS5641585A/en
Publication of JPS5641585A publication Critical patent/JPS5641585A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory

Landscapes

  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To make it possible to maintain memory even while electric power supply is cut off by displaying functions of ROM by applying two inverters, constituting RAM, with difference voltages from different electric power sources. CONSTITUTION:The 1st inverter, consisting of enhancement transistor Q3 and depletion load transistor QD1 constituting FF as a RAM cell, and the 2nd inverter constituted similarly are connected to different electric power sources Vcc1 and Vcc2. When both the electric power sources are biased by the same voltage, the RAM cell functions as RAM, grounding only the other electric power source Vcc2, etc., develops voltage Vcc1 at the output of the inverter connected to electric power source Vcc1, and the other inverter functions as ROM by determining data that the cell has so that its output is at the earth level. Therefore, the operation with ROM functions makes it possible to maintain memory even with the electric power supply cut off.
JP11502079A 1979-09-07 1979-09-07 Memory Pending JPS5641585A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11502079A JPS5641585A (en) 1979-09-07 1979-09-07 Memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11502079A JPS5641585A (en) 1979-09-07 1979-09-07 Memory

Publications (1)

Publication Number Publication Date
JPS5641585A true JPS5641585A (en) 1981-04-18

Family

ID=14652250

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11502079A Pending JPS5641585A (en) 1979-09-07 1979-09-07 Memory

Country Status (1)

Country Link
JP (1) JPS5641585A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051958A (en) * 1984-11-13 1991-09-24 Fujitsu Limited Nonvolatile static memory device utilizing separate power supplies
US5159571A (en) * 1987-12-29 1992-10-27 Hitachi, Ltd. Semiconductor memory with a circuit for testing characteristics of flip-flops including selectively applied power supply voltages
JPH0586835U (en) * 1992-04-28 1993-11-22 昭和電工株式会社 Card holding structure for container box

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5051958A (en) * 1984-11-13 1991-09-24 Fujitsu Limited Nonvolatile static memory device utilizing separate power supplies
US5159571A (en) * 1987-12-29 1992-10-27 Hitachi, Ltd. Semiconductor memory with a circuit for testing characteristics of flip-flops including selectively applied power supply voltages
JPH0586835U (en) * 1992-04-28 1993-11-22 昭和電工株式会社 Card holding structure for container box

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