JPS5646583A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPS5646583A JPS5646583A JP12222879A JP12222879A JPS5646583A JP S5646583 A JPS5646583 A JP S5646583A JP 12222879 A JP12222879 A JP 12222879A JP 12222879 A JP12222879 A JP 12222879A JP S5646583 A JPS5646583 A JP S5646583A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- electrodes
- layer
- covered
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07231—Techniques
- H10W72/07236—Soldering or alloying
Landscapes
- Die Bonding (AREA)
- Hall/Mr Elements (AREA)
Abstract
PURPOSE:To avoid the characteristic change of a semiconductor member by employing no adhesive but interposing a conductive metal molten layer when bonding an electrode formed on the member on a substrate and equalizing the thickness of the adhesive layer. CONSTITUTION:When forming a Hall device or the like, a semiconductor plate 8 is formed in a square shape, and there are formed a magnetic sensitive portion 9 at the center, and input electrodes 10, 11 and output electrodes 12, 13 on the periphery. When these electrodes are bonded on a square substrate 1 made of ferrite or silicon or the like, an insulating layer 2 made of SiO2 or the like is covered on the substrate 1, and low melting point metallic layers 3-6 of In, Sn, Pb, etc. are covered thereon while isolating it with isolating portions 7 and air gas portion 14. Thereafter, the plate 8 is placed on the substrate 1 while coinciding with the diagonal line of the substrate 1 at one side, the metallic layer is molten, and the substrate 1 is secured with the electrodes. Thus, the characteristic change of the semiconductor member due to the difference of thermal expansion coefficients can be reduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12222879A JPS5646583A (en) | 1979-09-21 | 1979-09-21 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12222879A JPS5646583A (en) | 1979-09-21 | 1979-09-21 | Semiconductor device and manufacture thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5646583A true JPS5646583A (en) | 1981-04-27 |
| JPH0230596B2 JPH0230596B2 (en) | 1990-07-06 |
Family
ID=14830733
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12222879A Granted JPS5646583A (en) | 1979-09-21 | 1979-09-21 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5646583A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2569052A1 (en) * | 1984-08-10 | 1986-02-14 | Thomson Csf | Method of interconnecting integrated circuits |
| US4883773A (en) * | 1986-12-16 | 1989-11-28 | Sharp Kabushiki Kaisha | Method of producing magnetosensitive semiconductor devices |
| US5316803A (en) * | 1992-12-10 | 1994-05-31 | International Business Machines Corporation | Method for forming electrical interconnections in laminated vias |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4945455U (en) * | 1972-07-26 | 1974-04-20 | ||
| JPS5137424U (en) * | 1974-09-09 | 1976-03-19 | ||
| JPS5561024A (en) * | 1978-10-31 | 1980-05-08 | Bbc Brown Boveri & Cie | Method of manufacturing electric contact of semiconductor element |
-
1979
- 1979-09-21 JP JP12222879A patent/JPS5646583A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4945455U (en) * | 1972-07-26 | 1974-04-20 | ||
| JPS5137424U (en) * | 1974-09-09 | 1976-03-19 | ||
| JPS5561024A (en) * | 1978-10-31 | 1980-05-08 | Bbc Brown Boveri & Cie | Method of manufacturing electric contact of semiconductor element |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2569052A1 (en) * | 1984-08-10 | 1986-02-14 | Thomson Csf | Method of interconnecting integrated circuits |
| US4883773A (en) * | 1986-12-16 | 1989-11-28 | Sharp Kabushiki Kaisha | Method of producing magnetosensitive semiconductor devices |
| US5316803A (en) * | 1992-12-10 | 1994-05-31 | International Business Machines Corporation | Method for forming electrical interconnections in laminated vias |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0230596B2 (en) | 1990-07-06 |
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