JPS5647802A - Analog output device - Google Patents

Analog output device

Info

Publication number
JPS5647802A
JPS5647802A JP12323379A JP12323379A JPS5647802A JP S5647802 A JPS5647802 A JP S5647802A JP 12323379 A JP12323379 A JP 12323379A JP 12323379 A JP12323379 A JP 12323379A JP S5647802 A JPS5647802 A JP S5647802A
Authority
JP
Japan
Prior art keywords
analog
converter
analog output
data
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12323379A
Other languages
Japanese (ja)
Inventor
Iwao Sugiyama
Takeo Goto
Takehiko Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12323379A priority Critical patent/JPS5647802A/en
Publication of JPS5647802A publication Critical patent/JPS5647802A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: Not only to make do with one piece of D/A converter which is expensive but also to elevate accuracy of the analog output, by means of holding the analog signal in plural CR hold circuits by the time division system.
CONSTITUTION: A series digital signal E1 is converted to a parallel signal E5 by the series parallel converter 8, and is stored in the memory 26. A data stored in the memory 26 is read out in due order by the control circuit 24, is converted to an analog signal by the D/A converter, and it is output to the CR holding circuit through the analog switch 28. Since the speed at which the control circuit 24 scans the data is much faster than the speed at which the data is read out, accuracy of the analog output is kept high.
COPYRIGHT: (C)1981,JPO&Japio
JP12323379A 1979-09-27 1979-09-27 Analog output device Pending JPS5647802A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12323379A JPS5647802A (en) 1979-09-27 1979-09-27 Analog output device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12323379A JPS5647802A (en) 1979-09-27 1979-09-27 Analog output device

Publications (1)

Publication Number Publication Date
JPS5647802A true JPS5647802A (en) 1981-04-30

Family

ID=14855489

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12323379A Pending JPS5647802A (en) 1979-09-27 1979-09-27 Analog output device

Country Status (1)

Country Link
JP (1) JPS5647802A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5832503U (en) * 1981-08-21 1983-03-03 沖電気工業株式会社 Multi-channel continuous output D/A conversion circuit
JPS6116602U (en) * 1984-07-03 1986-01-30 ヤンマー農機株式会社 Control device
JPH04137009A (en) * 1990-09-27 1992-05-12 Shimadzu Corp Control device output method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5832503U (en) * 1981-08-21 1983-03-03 沖電気工業株式会社 Multi-channel continuous output D/A conversion circuit
JPS6116602U (en) * 1984-07-03 1986-01-30 ヤンマー農機株式会社 Control device
JPH04137009A (en) * 1990-09-27 1992-05-12 Shimadzu Corp Control device output method

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