JPS5648721A - Integrated circuit - Google Patents

Integrated circuit

Info

Publication number
JPS5648721A
JPS5648721A JP12455079A JP12455079A JPS5648721A JP S5648721 A JPS5648721 A JP S5648721A JP 12455079 A JP12455079 A JP 12455079A JP 12455079 A JP12455079 A JP 12455079A JP S5648721 A JPS5648721 A JP S5648721A
Authority
JP
Japan
Prior art keywords
clocked inverter
electric power
output
integrated circuit
signal line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12455079A
Other languages
Japanese (ja)
Inventor
Kazuki Yoshitake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12455079A priority Critical patent/JPS5648721A/en
Publication of JPS5648721A publication Critical patent/JPS5648721A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To enable an integrated circuit to operate with either a single electric power source or different electric power sources without malfunctioning due to external noises, etc., by interposing a clocked inverter between an external terminal and a signal line connected to it. CONSTITUTION:Output signal line 1 where the output signal of LSI appears is supplied with an electric power voltage by a clock signal and connected to output terminal 6 via clocked inverter 10 that gets ready to operate. Then, signal line 3 is connected to output terminal 6 via the other clocked inverter 11 and between the input and output of clocked inverter 11, the output and input of the other clocked inverter 12 are connected respectively. Clocked inverters 10 and 11 and clocked inverter 12 are constituted in electric power source circuits B' and A' and electric power voltages to be supplied are different. Thus, the integrated circuit can be obtained which even if a noise appears at external terminals 6 due to floating capacity, etc., never operates abnormally without permitting the noise to enter LSI.
JP12455079A 1979-09-27 1979-09-27 Integrated circuit Pending JPS5648721A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12455079A JPS5648721A (en) 1979-09-27 1979-09-27 Integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12455079A JPS5648721A (en) 1979-09-27 1979-09-27 Integrated circuit

Publications (1)

Publication Number Publication Date
JPS5648721A true JPS5648721A (en) 1981-05-02

Family

ID=14888245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12455079A Pending JPS5648721A (en) 1979-09-27 1979-09-27 Integrated circuit

Country Status (1)

Country Link
JP (1) JPS5648721A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5886484A (en) * 1981-11-18 1983-05-24 Nec Corp Electronic timepiece
JPS58121830A (en) * 1982-01-14 1983-07-20 Matsushita Electric Ind Co Ltd Output driving circuit
JPS6067402U (en) * 1983-10-18 1985-05-13 エスエムシ−株式会社 actuator
JPS6116095A (en) * 1984-06-30 1986-01-24 Toshiba Corp Semiconductor integrated circuit device
JPS61282607A (en) * 1985-06-05 1986-12-12 ゼネラル　モ−タ−ズ　コ−ポレ−シヨン Actuator for conducting convertion into rotary motion of linear motion and conversion reverse to said conversion

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4852346A (en) * 1971-10-30 1973-07-23
JPS5412771A (en) * 1977-06-29 1979-01-30 Hokushin Electric Works Exciter for electromagnetic flowmeter

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4852346A (en) * 1971-10-30 1973-07-23
JPS5412771A (en) * 1977-06-29 1979-01-30 Hokushin Electric Works Exciter for electromagnetic flowmeter

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5886484A (en) * 1981-11-18 1983-05-24 Nec Corp Electronic timepiece
JPS58121830A (en) * 1982-01-14 1983-07-20 Matsushita Electric Ind Co Ltd Output driving circuit
JPS6067402U (en) * 1983-10-18 1985-05-13 エスエムシ−株式会社 actuator
JPS6116095A (en) * 1984-06-30 1986-01-24 Toshiba Corp Semiconductor integrated circuit device
JPS61282607A (en) * 1985-06-05 1986-12-12 ゼネラル　モ−タ−ズ　コ−ポレ−シヨン Actuator for conducting convertion into rotary motion of linear motion and conversion reverse to said conversion

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