JPS5648759A - Vertical synchronism detecting circuit - Google Patents

Vertical synchronism detecting circuit

Info

Publication number
JPS5648759A
JPS5648759A JP12544279A JP12544279A JPS5648759A JP S5648759 A JPS5648759 A JP S5648759A JP 12544279 A JP12544279 A JP 12544279A JP 12544279 A JP12544279 A JP 12544279A JP S5648759 A JPS5648759 A JP S5648759A
Authority
JP
Japan
Prior art keywords
amplitude
video signal
vertical synchronizing
circuit
delayed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12544279A
Other languages
Japanese (ja)
Inventor
Hiroo Kitazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12544279A priority Critical patent/JPS5648759A/en
Publication of JPS5648759A publication Critical patent/JPS5648759A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/08Separation of synchronising signals from picture signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To obtain a picture screen of good quality by detecting a vertical synchronizing signal stably by performing amplitude separation and frequency separation after processing an input video signal so that its equalized pulse part and vertical synchronizing pulse part will increase in amplitude. CONSTITUTION:A television video signal is delayed by delay circuit 3 (n) times by each delay time TH/2 a half as long as one horizontal period TH, and the video signal input and a video signal delayed TH/2 behind by delay circuit 3 or video signals delayed TH/2Xn behind are added together by adding circuit 2. Thus, an addition output signal having equalized pulse and vertical synchronizing pulse parts in the input video signal increased in amplitude (n+1) times and after those amplitude increase parts are securely separated by amplitude separating circuit 4, a vertical synchronizing signal is detected by frequency separating circuit 5.
JP12544279A 1979-09-29 1979-09-29 Vertical synchronism detecting circuit Pending JPS5648759A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12544279A JPS5648759A (en) 1979-09-29 1979-09-29 Vertical synchronism detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12544279A JPS5648759A (en) 1979-09-29 1979-09-29 Vertical synchronism detecting circuit

Publications (1)

Publication Number Publication Date
JPS5648759A true JPS5648759A (en) 1981-05-02

Family

ID=14910183

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12544279A Pending JPS5648759A (en) 1979-09-29 1979-09-29 Vertical synchronism detecting circuit

Country Status (1)

Country Link
JP (1) JPS5648759A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5036343A (en) * 1987-05-29 1991-07-30 Asahi Kogaku Kogyo K.K. Camera with side-mounted balancer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5036343A (en) * 1987-05-29 1991-07-30 Asahi Kogaku Kogyo K.K. Camera with side-mounted balancer

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