JPS5657176A - Paper control circuit - Google Patents

Paper control circuit

Info

Publication number
JPS5657176A
JPS5657176A JP13331079A JP13331079A JPS5657176A JP S5657176 A JPS5657176 A JP S5657176A JP 13331079 A JP13331079 A JP 13331079A JP 13331079 A JP13331079 A JP 13331079A JP S5657176 A JPS5657176 A JP S5657176A
Authority
JP
Japan
Prior art keywords
slice level
r1wr5
rom8
ffs
resistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13331079A
Other languages
Japanese (ja)
Other versions
JPS6115476B2 (en
Inventor
Masahiro Oikawa
Tsugio Takahashi
Hidenori Satou
Tsuneo Hirose
Tadao Sendai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13331079A priority Critical patent/JPS5657176A/en
Publication of JPS5657176A publication Critical patent/JPS5657176A/en
Publication of JPS6115476B2 publication Critical patent/JPS6115476B2/ja
Granted legal-status Critical Current

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  • Conveying Record Carriers (AREA)
  • Character Input (AREA)

Abstract

PURPOSE: To make initial adjustment and adjustment for maintenance needless, by setting automatically a slice level without increment of the number of levels even for fluctuation of the output level of a paper detector.
CONSTITUTION: Light source 3 and photoelectric conversion element 1 are arranged opposedly to each other while interposing paper 4, and presence or absence of paper 4 is detected by element 1, and the detection signal is amplified by amplifier 2, thereby setting a slice level. This slice level setting circuit is provided with FFs 5W7, resistors R1WR5, operational amplifier 11, and comparator 12, and ROM8 is connected between FFs 5W7 and resistors R1WR5. An adding circuit is constituted with ROM8, resistors R1WR5, and amplifier 11, and nonlinear outputs O1WO5 of the slice level are output on a basis of states of ouputs X, Y and Z of FFs 5W7 by ROM8, and the slice level is set automatically by comparator 12, thus making initial adjustment and adjustment for maintenance needless.
COPYRIGHT: (C)1981,JPO&Japio
JP13331079A 1979-10-16 1979-10-16 Paper control circuit Granted JPS5657176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13331079A JPS5657176A (en) 1979-10-16 1979-10-16 Paper control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13331079A JPS5657176A (en) 1979-10-16 1979-10-16 Paper control circuit

Publications (2)

Publication Number Publication Date
JPS5657176A true JPS5657176A (en) 1981-05-19
JPS6115476B2 JPS6115476B2 (en) 1986-04-24

Family

ID=15101676

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13331079A Granted JPS5657176A (en) 1979-10-16 1979-10-16 Paper control circuit

Country Status (1)

Country Link
JP (1) JPS5657176A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5771080A (en) * 1980-10-22 1982-05-01 Fujitsu Ltd Medium detector
JPS58184686A (en) * 1982-04-22 1983-10-28 Oki Electric Ind Co Ltd Medium detection system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5771080A (en) * 1980-10-22 1982-05-01 Fujitsu Ltd Medium detector
JPS58184686A (en) * 1982-04-22 1983-10-28 Oki Electric Ind Co Ltd Medium detection system

Also Published As

Publication number Publication date
JPS6115476B2 (en) 1986-04-24

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