JPS5668030A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS5668030A
JPS5668030A JP14417879A JP14417879A JPS5668030A JP S5668030 A JPS5668030 A JP S5668030A JP 14417879 A JP14417879 A JP 14417879A JP 14417879 A JP14417879 A JP 14417879A JP S5668030 A JPS5668030 A JP S5668030A
Authority
JP
Japan
Prior art keywords
output
logic
logic circuit
circuit
detecting method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14417879A
Other languages
Japanese (ja)
Other versions
JPH0127609B2 (en
Inventor
Yasuo Akatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP14417879A priority Critical patent/JPS5668030A/en
Priority to US06/139,595 priority patent/US4337525A/en
Priority to DE8080102068T priority patent/DE3070410D1/en
Priority to EP80102068A priority patent/EP0017990B1/en
Publication of JPS5668030A publication Critical patent/JPS5668030A/en
Publication of JPH0127609B2 publication Critical patent/JPH0127609B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To prevent the trouble of the flow of abnormal current, the inversion of a logic state into an erroneous state, etc., by providing a logic circuit with a means of detecting its output being at a proper logic level. CONSTITUTION:Logic circuit R consists of inverter circuit I and detecting method S. When input IN is in the dean area regarding output OUT of circuit I and output OUT is not at a logic level, detecting method S generates output OS. This detection output is used for resetting the device, etc. Consequently, the troubles caused when the logic circuit is disabled to function normally can be prevented.
JP14417879A 1979-04-17 1979-11-07 Logic circuit Granted JPS5668030A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP14417879A JPS5668030A (en) 1979-11-07 1979-11-07 Logic circuit
US06/139,595 US4337525A (en) 1979-04-17 1980-04-11 Asynchronous circuit responsive to changes in logic level
DE8080102068T DE3070410D1 (en) 1979-04-17 1980-04-17 Integrated memory circuit
EP80102068A EP0017990B1 (en) 1979-04-17 1980-04-17 Integrated memory circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14417879A JPS5668030A (en) 1979-11-07 1979-11-07 Logic circuit

Publications (2)

Publication Number Publication Date
JPS5668030A true JPS5668030A (en) 1981-06-08
JPH0127609B2 JPH0127609B2 (en) 1989-05-30

Family

ID=15356008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14417879A Granted JPS5668030A (en) 1979-04-17 1979-11-07 Logic circuit

Country Status (1)

Country Link
JP (1) JPS5668030A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952492A (en) * 1982-09-17 1984-03-27 Fujitsu Ltd Static semiconductor storage device
JPS62165785A (en) * 1986-01-17 1987-07-22 Mitsubishi Electric Corp Semiconductor memory device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437462A (en) * 1977-08-29 1979-03-19 Toshiba Corp Complementary mos circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437462A (en) * 1977-08-29 1979-03-19 Toshiba Corp Complementary mos circuit device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5952492A (en) * 1982-09-17 1984-03-27 Fujitsu Ltd Static semiconductor storage device
JPS62165785A (en) * 1986-01-17 1987-07-22 Mitsubishi Electric Corp Semiconductor memory device

Also Published As

Publication number Publication date
JPH0127609B2 (en) 1989-05-30

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