JPS567290A - Memory unit - Google Patents
Memory unitInfo
- Publication number
- JPS567290A JPS567290A JP8358879A JP8358879A JPS567290A JP S567290 A JPS567290 A JP S567290A JP 8358879 A JP8358879 A JP 8358879A JP 8358879 A JP8358879 A JP 8358879A JP S567290 A JPS567290 A JP S567290A
- Authority
- JP
- Japan
- Prior art keywords
- ram
- information
- inversion
- tsf2
- tsf1
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 241001269238 Data Species 0.000 abstract 2
- 102100026758 Serine/threonine-protein kinase 16 Human genes 0.000 abstract 2
- 101150108263 Stk16 gene Proteins 0.000 abstract 2
- 101150077668 TSF1 gene Proteins 0.000 abstract 2
- 238000012545 processing Methods 0.000 abstract 1
- 230000003068 static effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To invert memory information easily with one instruction to reduce the load of software in the video system and so on, by selecting information in the static RAM and its inversion information by set and reset of an FF. CONSTITUTION:Select signal memory FF is set in the initial state of the system, and gate TSF1 becomes nonconductive by the output, and gate TSF2 becomes conductive, and processings for all datas are executed through digit line Q of the RAM. Next, in case that inversion datas of a series of data stored in the RAM are required, the FF is reset by an instruction and so on, and TSF2 and TSF1 are made nonconductive and conductive respectively by the output of the FF, and data common line Q' is connected to the read amplifier, and all values at designated addresses of the RAM are handled as inversion information of stored values.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8358879A JPS567290A (en) | 1979-07-02 | 1979-07-02 | Memory unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8358879A JPS567290A (en) | 1979-07-02 | 1979-07-02 | Memory unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS567290A true JPS567290A (en) | 1981-01-24 |
| JPS6160516B2 JPS6160516B2 (en) | 1986-12-20 |
Family
ID=13806643
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8358879A Granted JPS567290A (en) | 1979-07-02 | 1979-07-02 | Memory unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS567290A (en) |
-
1979
- 1979-07-02 JP JP8358879A patent/JPS567290A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6160516B2 (en) | 1986-12-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ES486103A1 (en) | Data processing system having an integrated stack and register machine architecture. | |
| JPS5657140A (en) | Address designation system of desk calculator | |
| GB1332031A (en) | Information processing systems | |
| JPS5324238A (en) | Data processing system for display system | |
| JPS5510614A (en) | Controller | |
| JPS5523504A (en) | Message communication system in multi-processor | |
| JPS54108539A (en) | Virtual memory control system of information processor | |
| JPS5737795A (en) | Read-only memory element | |
| JPS54148339A (en) | Memory device | |
| JPS5748141A (en) | Address conversion system | |
| JPS57117069A (en) | Information retrieval device | |
| GB1555234A (en) | Computer input/output system with paged memory | |
| JPS5733472A (en) | Memory access control system | |
| JPS57162160A (en) | Storage element with clear function | |
| JPS57208689A (en) | Memory control device | |
| GB1521737A (en) | Data processing | |
| SU618744A1 (en) | Information primary processing arrangement | |
| SU809564A1 (en) | Decoder | |
| JPS57137938A (en) | Data processor | |
| JPS55112661A (en) | Memory control unit | |
| JPS56149626A (en) | Channel device | |
| JPS56168251A (en) | Data transfer buffer system | |
| JPS5640347A (en) | Data transmission system | |
| JPS57200992A (en) | Memory circuit | |
| JPS57176464A (en) | Data transfer system |