JPS5673447A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5673447A
JPS5673447A JP15097879A JP15097879A JPS5673447A JP S5673447 A JPS5673447 A JP S5673447A JP 15097879 A JP15097879 A JP 15097879A JP 15097879 A JP15097879 A JP 15097879A JP S5673447 A JPS5673447 A JP S5673447A
Authority
JP
Japan
Prior art keywords
layer
irradiating
laser beam
pulse width
aperture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15097879A
Other languages
Japanese (ja)
Other versions
JPS6360551B2 (en
Inventor
Kazuyoshi Shinada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP15097879A priority Critical patent/JPS5673447A/en
Publication of JPS5673447A publication Critical patent/JPS5673447A/en
Publication of JPS6360551B2 publication Critical patent/JPS6360551B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Drying Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To obtain the device having a sharrow junction by a method wherein an aperture is made on the SiO2 film of a single crystal Si substrate, a noncrystal Si is superposed, the aperture section only is single-crystallized and other sections are polycrystallized by irradiating the laser beam having a short-pulse width and the ion-injected layer of the single-crystallized section is activated by irradiating the laser beam having a long pulse width. CONSTITUTION:An n epitaxial layer 13 is formed on the n<+> burried collector 12 of a p type substrate 1, a resist mask is provided on the island type layer 13 which has been isolated by an SiO2 14 and a p<+> exterior base 19 is formed by performing an ion injection. An aperture 20 is opened on the SiO2 17 directly below the mask by exposing HF gas and the mask is melted and removed. Then a noncrystal Si is superposed, it is fused by irradiating the laser beam having a short pulse width, it is changed to a single crystal 21 on the n layer 13 of the aperture 20 and changed to Si of a polycrystal 22 on the SiO2 17 and 17'. After a layer 22 is selectively removed by performing a wet etching, B and AS ions are brought in the layers 13 and 21 respectively, they are activated by irradiating the laser beam having a long pulse width, an inner base 24 is formed by the outer base 23 and the layer 21 and an n<+> emitter is made in the layer 21. Now a sharrow junction is formed by self alignment and a high-speed device can be obtained.
JP15097879A 1979-11-21 1979-11-21 Manufacture of semiconductor device Granted JPS5673447A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15097879A JPS5673447A (en) 1979-11-21 1979-11-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15097879A JPS5673447A (en) 1979-11-21 1979-11-21 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS5673447A true JPS5673447A (en) 1981-06-18
JPS6360551B2 JPS6360551B2 (en) 1988-11-24

Family

ID=15508601

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15097879A Granted JPS5673447A (en) 1979-11-21 1979-11-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5673447A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846677A (en) * 1981-09-11 1983-03-18 Matsushita Electric Ind Co Ltd Bipolar transistor and preparation of the same
JPS5848440A (en) * 1981-09-16 1983-03-22 Fujitsu Ltd Manufacture of semiconductor device
JPS61242073A (en) * 1985-04-19 1986-10-28 Fujitsu Ltd Manufacture of semiconductor device
WO2023013483A1 (en) * 2021-08-05 2023-02-09 東京エレクトロン株式会社 Film formation method and film formation device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846677A (en) * 1981-09-11 1983-03-18 Matsushita Electric Ind Co Ltd Bipolar transistor and preparation of the same
JPS5848440A (en) * 1981-09-16 1983-03-22 Fujitsu Ltd Manufacture of semiconductor device
JPS61242073A (en) * 1985-04-19 1986-10-28 Fujitsu Ltd Manufacture of semiconductor device
WO2023013483A1 (en) * 2021-08-05 2023-02-09 東京エレクトロン株式会社 Film formation method and film formation device

Also Published As

Publication number Publication date
JPS6360551B2 (en) 1988-11-24

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