JPS5679302A - Sequence controller - Google Patents

Sequence controller

Info

Publication number
JPS5679302A
JPS5679302A JP15482179A JP15482179A JPS5679302A JP S5679302 A JPS5679302 A JP S5679302A JP 15482179 A JP15482179 A JP 15482179A JP 15482179 A JP15482179 A JP 15482179A JP S5679302 A JPS5679302 A JP S5679302A
Authority
JP
Japan
Prior art keywords
output
signal
increase
bus line
elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15482179A
Other languages
Japanese (ja)
Inventor
Masaaki Murakoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shibaura Machine Co Ltd
Original Assignee
Toshiba Machine Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Machine Co Ltd filed Critical Toshiba Machine Co Ltd
Priority to JP15482179A priority Critical patent/JPS5679302A/en
Publication of JPS5679302A publication Critical patent/JPS5679302A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control By Computers (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE: To eliminate the need to increase the number of wirings greatly even if elements increase in number, by providing an interface between a bus line led from a controller and respective input-output elements.
CONSTITUTION: Interface device FV is coupled with a set of input element 114 and output element 13. Then, control parts 11-5 and 11-6 and device iFU are connected together via bus line BL. A signal on bus line BL is waveformsphaped and level- converted by signal converting circuit 101 into signal CI, which is inputted to conter 102, The output of counter 102 is compared with value ADR(i) of the address that corresponds to output element 113 and when the both coincide mutually, an identity signal is detected 6 for the breaking of a line, thereby outputting 113 the output of the detection via latch circuit 110. Thus, the need to increase the number of wiring greately is eliminated even if the number of elements increases.
COPYRIGHT: (C)1981,JPO&Japio
JP15482179A 1979-11-29 1979-11-29 Sequence controller Pending JPS5679302A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15482179A JPS5679302A (en) 1979-11-29 1979-11-29 Sequence controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15482179A JPS5679302A (en) 1979-11-29 1979-11-29 Sequence controller

Publications (1)

Publication Number Publication Date
JPS5679302A true JPS5679302A (en) 1981-06-29

Family

ID=15592602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15482179A Pending JPS5679302A (en) 1979-11-29 1979-11-29 Sequence controller

Country Status (1)

Country Link
JP (1) JPS5679302A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63155505U (en) * 1987-03-27 1988-10-12

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63155505U (en) * 1987-03-27 1988-10-12

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