JPS5680875A - Magnetic bubble memory chip - Google Patents

Magnetic bubble memory chip

Info

Publication number
JPS5680875A
JPS5680875A JP15551579A JP15551579A JPS5680875A JP S5680875 A JPS5680875 A JP S5680875A JP 15551579 A JP15551579 A JP 15551579A JP 15551579 A JP15551579 A JP 15551579A JP S5680875 A JPS5680875 A JP S5680875A
Authority
JP
Japan
Prior art keywords
pattern
memory chip
insulating layer
magnetic bubble
bubble memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15551579A
Other languages
Japanese (ja)
Inventor
Akira Hirano
Hideki Fujiwara
Masashi Amatsu
Hiroshi Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15551579A priority Critical patent/JPS5680875A/en
Publication of JPS5680875A publication Critical patent/JPS5680875A/en
Pending legal-status Critical Current

Links

Landscapes

  • Thin Magnetic Films (AREA)

Abstract

PURPOSE: To carry out the most suitable alignment of a bias margin correspondingly to the function of the pattern without changing the pattern by selecting the thickness of an insulating layer for a spacer.
CONSTITUTION: On the SiO2 insulating layer 21 formed on gadolinium, gallium or garnet substrate 17, permalloy pattern 22a is disposed and on the SiO2 insulating laye 23 of a adjusting spacer laminated on the layer 21, permalloy pattern 22b or the like is provided, thereby a memory chip is formed. By this constitution, in accordance with the function of the pattern such as major loop minor loop, the thickness of the insulating layer is selected to the most suitable value to which the bias margin is aligned, and the bias margin is adjusted easily so as to be most suitable by a formation process without changing the pattern.
COPYRIGHT: (C)1981,JPO&Japio
JP15551579A 1979-12-03 1979-12-03 Magnetic bubble memory chip Pending JPS5680875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15551579A JPS5680875A (en) 1979-12-03 1979-12-03 Magnetic bubble memory chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15551579A JPS5680875A (en) 1979-12-03 1979-12-03 Magnetic bubble memory chip

Publications (1)

Publication Number Publication Date
JPS5680875A true JPS5680875A (en) 1981-07-02

Family

ID=15607734

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15551579A Pending JPS5680875A (en) 1979-12-03 1979-12-03 Magnetic bubble memory chip

Country Status (1)

Country Link
JP (1) JPS5680875A (en)

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