JPS5690651A - Synchronizing circuit - Google Patents

Synchronizing circuit

Info

Publication number
JPS5690651A
JPS5690651A JP16692379A JP16692379A JPS5690651A JP S5690651 A JPS5690651 A JP S5690651A JP 16692379 A JP16692379 A JP 16692379A JP 16692379 A JP16692379 A JP 16692379A JP S5690651 A JPS5690651 A JP S5690651A
Authority
JP
Japan
Prior art keywords
frame
synchronizing
multiframe
pattern
synchronizing circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16692379A
Other languages
Japanese (ja)
Other versions
JPS5952586B2 (en
Inventor
Seiji Okamoto
Sukehide Okano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP54166923A priority Critical patent/JPS5952586B2/en
Publication of JPS5690651A publication Critical patent/JPS5690651A/en
Publication of JPS5952586B2 publication Critical patent/JPS5952586B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To make it possible to prevent erroneous frame synchronization of a PCM device by providing a frame synchronizing circuit and a means of detecting a multiframe synchronizing pattern of random frame phase, and then by putting them in specific operation. CONSTITUTION:The synchronizing circuit whose multiframe consists of 12 frames and which receives a primary group PCM signals, following CCITT advice G.733, having a prescribed frame synchronizing signal and multiframe pattern inserted into the initial bit of each frame is provided with a frame synchronizing circuit and a means of detecting multiframe synchronizing patterns of random frame phase. In the acquisition of synchronism, when a frame synchronizing pattern is discriminated and a multiframe synchronizing pattern is not detected, the retrieval of synchronizing bits is continued without maintaining the frame synchronism.
JP54166923A 1979-12-24 1979-12-24 synchronous circuit Expired JPS5952586B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54166923A JPS5952586B2 (en) 1979-12-24 1979-12-24 synchronous circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54166923A JPS5952586B2 (en) 1979-12-24 1979-12-24 synchronous circuit

Publications (2)

Publication Number Publication Date
JPS5690651A true JPS5690651A (en) 1981-07-22
JPS5952586B2 JPS5952586B2 (en) 1984-12-20

Family

ID=15840154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54166923A Expired JPS5952586B2 (en) 1979-12-24 1979-12-24 synchronous circuit

Country Status (1)

Country Link
JP (1) JPS5952586B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59176941A (en) * 1983-03-26 1984-10-06 Nec Corp Frame synchronism circuit
JPS61117939A (en) * 1984-11-13 1986-06-05 Koonan Eng Kk Signal synchronizing system for data transmission
JPS6256042A (en) * 1985-09-04 1987-03-11 Fujitsu Ltd Multi-frame synchronizing circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61206279U (en) * 1985-06-13 1986-12-26

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59176941A (en) * 1983-03-26 1984-10-06 Nec Corp Frame synchronism circuit
JPS61117939A (en) * 1984-11-13 1986-06-05 Koonan Eng Kk Signal synchronizing system for data transmission
JPS6256042A (en) * 1985-09-04 1987-03-11 Fujitsu Ltd Multi-frame synchronizing circuit

Also Published As

Publication number Publication date
JPS5952586B2 (en) 1984-12-20

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