JPS57128943A - Insulation isolated semiconductor integrated device and manufacture thereof - Google Patents

Insulation isolated semiconductor integrated device and manufacture thereof

Info

Publication number
JPS57128943A
JPS57128943A JP56014094A JP1409481A JPS57128943A JP S57128943 A JPS57128943 A JP S57128943A JP 56014094 A JP56014094 A JP 56014094A JP 1409481 A JP1409481 A JP 1409481A JP S57128943 A JPS57128943 A JP S57128943A
Authority
JP
Japan
Prior art keywords
layer
region
pattern
substrate
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56014094A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6155253B2 (2
Inventor
Akinobu Satou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Original Assignee
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI filed Critical JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority to JP56014094A priority Critical patent/JPS57128943A/ja
Publication of JPS57128943A publication Critical patent/JPS57128943A/ja
Publication of JPS6155253B2 publication Critical patent/JPS6155253B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/191—Preparing SOI wafers using full isolation by porous oxide silicon [FIPOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

Landscapes

  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
JP56014094A 1981-02-02 1981-02-02 Insulation isolated semiconductor integrated device and manufacture thereof Granted JPS57128943A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56014094A JPS57128943A (en) 1981-02-02 1981-02-02 Insulation isolated semiconductor integrated device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56014094A JPS57128943A (en) 1981-02-02 1981-02-02 Insulation isolated semiconductor integrated device and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS57128943A true JPS57128943A (en) 1982-08-10
JPS6155253B2 JPS6155253B2 (2) 1986-11-27

Family

ID=11851515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56014094A Granted JPS57128943A (en) 1981-02-02 1981-02-02 Insulation isolated semiconductor integrated device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS57128943A (2)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59175744A (ja) * 1983-03-25 1984-10-04 Fujitsu Ltd 半導体装置及びその製造方法
JPH05166919A (ja) * 1991-12-18 1993-07-02 Mitsubishi Electric Corp 半導体装置及びその製造方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4967456A (en) 1987-04-23 1990-11-06 International Paper Company Apparatus and method for hydroenhancing fabric
JP7335886B2 (ja) 2018-09-28 2023-08-30 古河電気工業株式会社 絶縁被覆化合物超電導線およびその巻替え方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59175744A (ja) * 1983-03-25 1984-10-04 Fujitsu Ltd 半導体装置及びその製造方法
JPH05166919A (ja) * 1991-12-18 1993-07-02 Mitsubishi Electric Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
JPS6155253B2 (2) 1986-11-27

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