JPS5714958A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5714958A
JPS5714958A JP9009580A JP9009580A JPS5714958A JP S5714958 A JPS5714958 A JP S5714958A JP 9009580 A JP9009580 A JP 9009580A JP 9009580 A JP9009580 A JP 9009580A JP S5714958 A JPS5714958 A JP S5714958A
Authority
JP
Japan
Prior art keywords
memory
program
key word
interface control
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9009580A
Other languages
Japanese (ja)
Inventor
Osamu Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9009580A priority Critical patent/JPS5714958A/en
Publication of JPS5714958A publication Critical patent/JPS5714958A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To improve the controllability for data access within a memory, by realizing access processing with the key word formed by the functional name, symbol and the like which are used in a program. CONSTITUTION:An input part 18 connected to a main device 12 includes an operation part 8, a display part 9, an interface control circuit 10 and a control part 19 of program information. The data relating to the program to be executed by a memory 4 from the part is acessed 8 via an interface control part 13 and an interface circuit 5. In this case, the key word of the program is registered in a memory 16, and an interface control circuit 17 collate the key word of access request through the part 8 and then a corresponding physical address grows to put in on a data transfer memory 14. Then access request is given to a central processor 3.
JP9009580A 1980-06-30 1980-06-30 Data processor Pending JPS5714958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9009580A JPS5714958A (en) 1980-06-30 1980-06-30 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9009580A JPS5714958A (en) 1980-06-30 1980-06-30 Data processor

Publications (1)

Publication Number Publication Date
JPS5714958A true JPS5714958A (en) 1982-01-26

Family

ID=13988954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9009580A Pending JPS5714958A (en) 1980-06-30 1980-06-30 Data processor

Country Status (1)

Country Link
JP (1) JPS5714958A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62100896U (en) * 1985-12-16 1987-06-26

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62100896U (en) * 1985-12-16 1987-06-26

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