JPS57181252A - Method and device for removing transmission distortion of signal state of data distribution system - Google Patents
Method and device for removing transmission distortion of signal state of data distribution systemInfo
- Publication number
- JPS57181252A JPS57181252A JP57037329A JP3732982A JPS57181252A JP S57181252 A JPS57181252 A JP S57181252A JP 57037329 A JP57037329 A JP 57037329A JP 3732982 A JP3732982 A JP 3732982A JP S57181252 A JPS57181252 A JP S57181252A
- Authority
- JP
- Japan
- Prior art keywords
- state
- data
- distribution system
- time marker
- data distribution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 title 1
- 239000003550 marker Substances 0.000 abstract 4
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0682—Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing
- H04L5/225—Arrangements affording multiple use of the transmission path using time-division multiplexing combined with the use of transition coding
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Small-Scale Networks (AREA)
- Communication Control (AREA)
- Computer And Data Communications (AREA)
- Radio Relay Systems (AREA)
- Time-Division Multiplex Systems (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP81850041A EP0059821B1 (de) | 1981-03-11 | 1981-03-11 | Verfahren und Vorrichtung, z.B. in einem Datenverteilungssystem, unter anderem zur Vermeidung von Verzerrungen bei der Übertragung von Signalzuständen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57181252A true JPS57181252A (en) | 1982-11-08 |
Family
ID=8188728
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57037329A Pending JPS57181252A (en) | 1981-03-11 | 1982-03-11 | Method and device for removing transmission distortion of signal state of data distribution system |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0059821B1 (de) |
| JP (1) | JPS57181252A (de) |
| AT (1) | ATE8725T1 (de) |
| DE (1) | DE3164961D1 (de) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0247026A3 (de) * | 1986-05-16 | 1989-09-06 | Austria Mikrosysteme International Gmbh | Verfahren zur Synchronisation der Echtzeituhren von an ein Kommunikationsmedium angeschlossenen Knotenrechnern und Knotenrechner zur Durchführung des Verfahrens |
| US5602992A (en) * | 1993-11-29 | 1997-02-11 | Intel Corporation | System for synchronizing data stream transferred from server to client by initializing clock when first packet is received and comparing packet time information with clock |
| JPH0856274A (ja) * | 1994-06-06 | 1996-02-27 | Ricoh Co Ltd | 画像形成装置の通信回路 |
| GB9821518D0 (en) | 1998-10-02 | 1998-11-25 | Sony Uk Ltd | Digital signal processing and signal format |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3755779A (en) * | 1971-12-14 | 1973-08-28 | Ibm | Error correction system for single-error correction, related-double-error correction and unrelated-double-error detection |
| DE2213062B2 (de) * | 1972-03-17 | 1980-09-25 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Triggerschaltung |
| US3820083A (en) * | 1972-08-04 | 1974-06-25 | Bell & Howell Co | Coded data enhancer,synchronizer,and parity remover systems |
| DE2259223A1 (de) * | 1972-12-04 | 1974-06-27 | Licentia Gmbh | Schaltungsanordnung zum verbinden einer mehrzahl von binaere informationen abgebende als auch aufnehmende einrichtungen |
| DE2504429A1 (de) * | 1975-02-04 | 1976-08-05 | Hartmann & Braun Ag | Schaltungsanordnung zur umformung des abstandes zweier impulsflanken beliebiger polaritaet in eine sollwertabhaengige logische aussage |
| US4004275A (en) * | 1976-01-12 | 1977-01-18 | International Business Machines Corporation | Self-clocking data entry unit system |
| DE2841171C3 (de) * | 1978-09-21 | 1984-04-26 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zum Entstören von Übertragungseinrichtungen für digitale Signale, insbesondere zum Ausblenden von höherfrequenten Störimpulsen beliebiger Polarität |
| EP0019689A1 (de) * | 1979-05-31 | 1980-12-10 | Siemens Aktiengesellschaft | Verfahren und Schaltungsanordnung zur Überprüfung von aus m Signaladern bestehenden Leitungsbündeln auf das Vorliegen einer Signalmarkierung auf nur einer der Signaladern |
-
1981
- 1981-03-11 AT AT81850041T patent/ATE8725T1/de not_active IP Right Cessation
- 1981-03-11 EP EP81850041A patent/EP0059821B1/de not_active Expired
- 1981-03-11 DE DE8181850041T patent/DE3164961D1/de not_active Expired
-
1982
- 1982-03-11 JP JP57037329A patent/JPS57181252A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE3164961D1 (en) | 1984-08-30 |
| EP0059821B1 (de) | 1984-07-25 |
| ATE8725T1 (de) | 1984-08-15 |
| EP0059821A1 (de) | 1982-09-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0378426A3 (de) | Datenübertragung über Busadressleitungen | |
| MY109682A (en) | Exchanging data and clock lines on multiple format data buses. | |
| EP0378427A3 (de) | Hochgeschwindigkeitsdatenübertragung auf einem Rechnersystembus | |
| HU9400175D0 (en) | Communication apparatus and method for transferring data from a source to one (or) more receivers | |
| JPS6453253A (en) | External apparatus connected to digital data processing system | |
| DE3471219D1 (en) | Method and device for the transfer of data in a data loop | |
| JPS6414631A (en) | Analog bus connecting system | |
| JPS57181252A (en) | Method and device for removing transmission distortion of signal state of data distribution system | |
| ES8708099A1 (es) | Instalacion para la conexion de dispositivos sensores con dispositivos accionadores | |
| EP0325455A3 (de) | Datenübertragungsverfahren und -system | |
| EP0352965A3 (de) | Datenübertragungssystem | |
| ZA847272B (en) | Data and signaling time slot transfer and processing system for a set of multiplex lines | |
| EP0344999A3 (de) | Datenübertragungssystem | |
| EP0130471A3 (de) | Interface-Kontroller zur Kopplung mehrerer asynchroner Busse und Datenverarbeitungssystem mit einem solchen Kontroller | |
| JPS5699530A (en) | Information transfer system | |
| JPS5717048A (en) | Time-division information output system of data transfer circuit | |
| JPS5690318A (en) | Bus sequence control system | |
| JPS54152942A (en) | Bus control system of data processing system | |
| JPS54140439A (en) | Composite computer device | |
| JPS57176441A (en) | Data transfer system | |
| GB2280768A (en) | A method and a system to transfer digital signals between a digital signal processor and peripheral circuits connected to it | |
| JPS5741725A (en) | Logical circuit system | |
| JPS5760758A (en) | Data transfer system | |
| JPS5444845A (en) | Multiple terminal data transfer system | |
| JPS57125434A (en) | System for selection of processing device from terminal |