JPS57190348A - Manufacture of bipolar semiconductor device - Google Patents

Manufacture of bipolar semiconductor device

Info

Publication number
JPS57190348A
JPS57190348A JP56075185A JP7518581A JPS57190348A JP S57190348 A JPS57190348 A JP S57190348A JP 56075185 A JP56075185 A JP 56075185A JP 7518581 A JP7518581 A JP 7518581A JP S57190348 A JPS57190348 A JP S57190348A
Authority
JP
Japan
Prior art keywords
layer
type
sides
sio2
films
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56075185A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6242395B2 (2
Inventor
Shuichi Kameyama
Koichi Kanzaki
Yoshitaka Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56075185A priority Critical patent/JPS57190348A/ja
Priority to US06/378,480 priority patent/US4433470A/en
Publication of JPS57190348A publication Critical patent/JPS57190348A/ja
Publication of JPS6242395B2 publication Critical patent/JPS6242395B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0121Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/1414Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/13Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/021Manufacture or treatment of interconnections within wafers or substrates

Landscapes

  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
JP56075185A 1981-05-19 1981-05-19 Manufacture of bipolar semiconductor device Granted JPS57190348A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP56075185A JPS57190348A (en) 1981-05-19 1981-05-19 Manufacture of bipolar semiconductor device
US06/378,480 US4433470A (en) 1981-05-19 1982-05-14 Method for manufacturing semiconductor device utilizing selective etching and diffusion

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56075185A JPS57190348A (en) 1981-05-19 1981-05-19 Manufacture of bipolar semiconductor device

Publications (2)

Publication Number Publication Date
JPS57190348A true JPS57190348A (en) 1982-11-22
JPS6242395B2 JPS6242395B2 (2) 1987-09-08

Family

ID=13568886

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56075185A Granted JPS57190348A (en) 1981-05-19 1981-05-19 Manufacture of bipolar semiconductor device

Country Status (1)

Country Link
JP (1) JPS57190348A (2)

Also Published As

Publication number Publication date
JPS6242395B2 (2) 1987-09-08

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