JPS57197864A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57197864A JPS57197864A JP57065340A JP6534082A JPS57197864A JP S57197864 A JPS57197864 A JP S57197864A JP 57065340 A JP57065340 A JP 57065340A JP 6534082 A JP6534082 A JP 6534082A JP S57197864 A JPS57197864 A JP S57197864A
- Authority
- JP
- Japan
- Prior art keywords
- base
- emitter
- shaped
- region
- type semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 abstract 1
- 238000007493 shaping process Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
- H10D48/30—Devices controlled by electric currents or voltages
- H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H10D48/34—Bipolar devices
- H10D48/345—Bipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions
Landscapes
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To increase the current density of an emitter by forming a reticulate emitter region surrounding a base region in a main surface and an emitter electrode and shaping a wiring layer connecting the base region in common through an insulating film. CONSTITUTION:A P type semiconductor layer 2 as the base layer is formed onto an N type semiconductor substrate 1 as a collector, and an N type diffusion layer 3 is shaped reticulately to the surface of the P type semiconductor layer 2 and used as the emitter region. An oxide film 4 is molded to the surface to protect the surface of a junction. The emitter electrode 5 is formed reticulately onto the emitter region 3. An oxide film 7 is shaped to the surface through a CVD method, etc. Openings are formed to the upper section of base electrodes 6, and a beltlike base electrode 8 connecting the base electrodes 6 is shaped.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57065340A JPS57197864A (en) | 1982-04-21 | 1982-04-21 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57065340A JPS57197864A (en) | 1982-04-21 | 1982-04-21 | Semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP49110530A Division JPS5138879A (en) | 1974-09-27 | 1974-09-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57197864A true JPS57197864A (en) | 1982-12-04 |
Family
ID=13284111
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57065340A Pending JPS57197864A (en) | 1982-04-21 | 1982-04-21 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57197864A (en) |
-
1982
- 1982-04-21 JP JP57065340A patent/JPS57197864A/en active Pending
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