JPS5739532A - Manufacture of compound semiconductor device - Google Patents

Manufacture of compound semiconductor device

Info

Publication number
JPS5739532A
JPS5739532A JP55115243A JP11524380A JPS5739532A JP S5739532 A JPS5739532 A JP S5739532A JP 55115243 A JP55115243 A JP 55115243A JP 11524380 A JP11524380 A JP 11524380A JP S5739532 A JPS5739532 A JP S5739532A
Authority
JP
Japan
Prior art keywords
injected
film
ion
aperture
compound semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55115243A
Other languages
Japanese (ja)
Inventor
Toshio Sugawa
Takeshi Konuma
Hideki Yakida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP55115243A priority Critical patent/JPS5739532A/en
Publication of JPS5739532A publication Critical patent/JPS5739532A/en
Pending legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To manufacture elements which have uniform characteristics with high reproducibility and high yield rate, by a method wherein the surface of a compound semiconductor substrate is selectively etched, impurity is introduced and metal or insulation layer is provided on the surface.
CONSTITUTION: When an Si3N4 film 8 is provided on the surface of a semiconductive GaAs substrate 7, a layer 9 in which Ga is missing is formed. Then an aperture is made in the Si3N4 film 8 by photoetching so as to expose GaAs and the layer 9 is removed by etching so as to expose a clean surface of the semiconductor. Then Si-ion is injected so as to form an N type region 13 and an Si3N4 film 8' is provided. And aperture for source and drain 15, 16 are made by photo-etching and Si-ion injected. Then a gate aperture 20 is made by photo-resit 19 and Be-ion is injected so as to form a P type region 21. Then electrodes 25, 26, 27 are formed by covering of AuGe alloy.
COPYRIGHT: (C)1982,JPO&Japio
JP55115243A 1980-08-20 1980-08-20 Manufacture of compound semiconductor device Pending JPS5739532A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55115243A JPS5739532A (en) 1980-08-20 1980-08-20 Manufacture of compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55115243A JPS5739532A (en) 1980-08-20 1980-08-20 Manufacture of compound semiconductor device

Publications (1)

Publication Number Publication Date
JPS5739532A true JPS5739532A (en) 1982-03-04

Family

ID=14657880

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55115243A Pending JPS5739532A (en) 1980-08-20 1980-08-20 Manufacture of compound semiconductor device

Country Status (1)

Country Link
JP (1) JPS5739532A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115482A (en) * 1973-03-03 1974-11-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115482A (en) * 1973-03-03 1974-11-05

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