JPS5740965A - Hybrid integrated circuit device - Google Patents

Hybrid integrated circuit device

Info

Publication number
JPS5740965A
JPS5740965A JP55117394A JP11739480A JPS5740965A JP S5740965 A JPS5740965 A JP S5740965A JP 55117394 A JP55117394 A JP 55117394A JP 11739480 A JP11739480 A JP 11739480A JP S5740965 A JPS5740965 A JP S5740965A
Authority
JP
Japan
Prior art keywords
dam
circuit board
integrated circuit
circuit device
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55117394A
Other languages
Japanese (ja)
Inventor
Toshio Hiroe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55117394A priority Critical patent/JPS5740965A/en
Publication of JPS5740965A publication Critical patent/JPS5740965A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07311—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07321—Aligning
    • H10W72/07327—Aligning involving guiding structures, e.g. spacers or supporting members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Cooling Or The Like Of Electrical Apparatus (AREA)

Abstract

PURPOSE:To prevent a circuit board from displacement and an adhesive from overflowing, by providing a dam along the rim of a circuit board on which a heat sink is mounted. CONSTITUTION:A dam 13 is provided along the rim of a circuit board 1 on which a heat sink 11 is mounted. A groove 13 is provided along the inner side of the dam 12. As a result, an adhesive 13 does not overflow before hardening. As the circuit board 1 is fastened by the dam 12, mislocation does not occur. Therefore, mislocation and adhesive overflow can be prevented and yield can be improved. Said dam and groove can be pressed in process. An electronic part is shown as 2 in Figure.
JP55117394A 1980-08-26 1980-08-26 Hybrid integrated circuit device Pending JPS5740965A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55117394A JPS5740965A (en) 1980-08-26 1980-08-26 Hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55117394A JPS5740965A (en) 1980-08-26 1980-08-26 Hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5740965A true JPS5740965A (en) 1982-03-06

Family

ID=14710557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55117394A Pending JPS5740965A (en) 1980-08-26 1980-08-26 Hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5740965A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01205032A (en) * 1988-02-09 1989-08-17 Nippon Steel Corp Manufacture of high-strength electric resistance welded tube for automobile use
JPH01130552U (en) * 1988-02-29 1989-09-05
US5150197A (en) * 1989-10-05 1992-09-22 Digital Equipment Corporation Die attach structure and method
EP0829097A4 (en) * 1995-05-26 1999-04-14 Hestia Technologies Inc TRANSFER MOLDING PROCESS FOR ELECTRONIC PACKAGES AND PRODUCED PACKAGES
KR100220492B1 (en) * 1996-12-06 1999-09-15 윤종용 Clip lead package
KR100386635B1 (en) * 2000-12-29 2003-06-02 앰코 테크놀로지 코리아 주식회사 Method for manufacturing substrate in semiconductor package
JP2005005671A (en) * 2003-05-19 2005-01-06 Denso Corp Heat dissipation structure for electronic components
EP1898465A2 (en) 2006-09-11 2008-03-12 Hitachi, Ltd. Power semiconductor module
JP2009164508A (en) * 2008-01-10 2009-07-23 Nissan Motor Co Ltd Method for producing joining member and joining structure
EP3690936A1 (en) * 2019-01-29 2020-08-05 Heraeus Deutschland GmbH & Co KG Method for manufacturing a spacer system with a chip recess, corresponding spacer system and its use for contacting a chip with a substrate by sintering

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01205032A (en) * 1988-02-09 1989-08-17 Nippon Steel Corp Manufacture of high-strength electric resistance welded tube for automobile use
JPH01130552U (en) * 1988-02-29 1989-09-05
US5150197A (en) * 1989-10-05 1992-09-22 Digital Equipment Corporation Die attach structure and method
EP0829097A4 (en) * 1995-05-26 1999-04-14 Hestia Technologies Inc TRANSFER MOLDING PROCESS FOR ELECTRONIC PACKAGES AND PRODUCED PACKAGES
KR100220492B1 (en) * 1996-12-06 1999-09-15 윤종용 Clip lead package
KR100386635B1 (en) * 2000-12-29 2003-06-02 앰코 테크놀로지 코리아 주식회사 Method for manufacturing substrate in semiconductor package
JP2005005671A (en) * 2003-05-19 2005-01-06 Denso Corp Heat dissipation structure for electronic components
EP1898465A2 (en) 2006-09-11 2008-03-12 Hitachi, Ltd. Power semiconductor module
EP1898465A3 (en) * 2006-09-11 2011-05-04 Hitachi, Ltd. Power semiconductor module
JP2009164508A (en) * 2008-01-10 2009-07-23 Nissan Motor Co Ltd Method for producing joining member and joining structure
EP3690936A1 (en) * 2019-01-29 2020-08-05 Heraeus Deutschland GmbH & Co KG Method for manufacturing a spacer system with a chip recess, corresponding spacer system and its use for contacting a chip with a substrate by sintering

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