JPS5744332A - Driving circuit for capacitive load - Google Patents

Driving circuit for capacitive load

Info

Publication number
JPS5744332A
JPS5744332A JP11909280A JP11909280A JPS5744332A JP S5744332 A JPS5744332 A JP S5744332A JP 11909280 A JP11909280 A JP 11909280A JP 11909280 A JP11909280 A JP 11909280A JP S5744332 A JPS5744332 A JP S5744332A
Authority
JP
Japan
Prior art keywords
npn
pnp
turns
driving circuit
clock pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11909280A
Other languages
Japanese (ja)
Inventor
Toshiji Nishimura
Takashi Noguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP11909280A priority Critical patent/JPS5744332A/en
Publication of JPS5744332A publication Critical patent/JPS5744332A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/02—Shaping pulses by amplifying

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To obtain a driving circuit which is suitable for IC-implementation and provides low-speed driving operation, by using pnp transistors (TR) and npn TRs as thyristors. CONSTITUTION:When a clock pulse supplied to a clock pulse input terminal 12 is inverted from a low to a high potential state, an emitter current flows to the 2nd pnp TR24 and the 1st npn TR14 turns on. At this time, the 2nd npn TR23 turns off because its base potential is -VCE and +VCE, turning off the 1st pnp TR13. Similarly, when the clock pulse is inverted from the high to the low potential state, the 2nd npn TR23 turns on the 1st pnp TR13 and the 2nd pnp TR24 turns on the 1st npn TR14.
JP11909280A 1980-08-29 1980-08-29 Driving circuit for capacitive load Pending JPS5744332A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11909280A JPS5744332A (en) 1980-08-29 1980-08-29 Driving circuit for capacitive load

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11909280A JPS5744332A (en) 1980-08-29 1980-08-29 Driving circuit for capacitive load

Publications (1)

Publication Number Publication Date
JPS5744332A true JPS5744332A (en) 1982-03-12

Family

ID=14752693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11909280A Pending JPS5744332A (en) 1980-08-29 1980-08-29 Driving circuit for capacitive load

Country Status (1)

Country Link
JP (1) JPS5744332A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613522A (en) * 1984-06-15 1986-01-09 Sony Corp clock driver
JPS62276078A (en) * 1986-05-23 1987-11-30 株式会社　ダスキン Dust control product and its production

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613522A (en) * 1984-06-15 1986-01-09 Sony Corp clock driver
JPS62276078A (en) * 1986-05-23 1987-11-30 株式会社　ダスキン Dust control product and its production

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