JPS57704A - Processing circuit for digital set value - Google Patents
Processing circuit for digital set valueInfo
- Publication number
- JPS57704A JPS57704A JP7419380A JP7419380A JPS57704A JP S57704 A JPS57704 A JP S57704A JP 7419380 A JP7419380 A JP 7419380A JP 7419380 A JP7419380 A JP 7419380A JP S57704 A JPS57704 A JP S57704A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- set value
- condition
- output
- condition circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B15/00—Systems controlled by a computer
- G05B15/02—Systems controlled by a computer electric
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Input From Keyboards Or The Like (AREA)
- Control By Computers (AREA)
Abstract
PURPOSE:To allow only one selected condition circuit to obtain a digital input by setting the output level of only the selected condition circuit to zero and by holding output sides of the other unselected condition circuit and a setting circuit at high levels. CONSTITUTION:If a CPU1 supplies a three-digit digital value to a setting circuit 11, this output is supplied as a positive high-level signal to respective condition circuits A, B, C, D, E, and F in common. Then, when a changeover decoder 12 is not in operation, every condition circuit is held at a positive high level and, therefore, generates no set value signal regardless of the existence of the outputting of the set value signal. When the decoder 12 selects one of the condition circuits, the output level of the selected condition circuit is zero through-out a selection time and the set value signal is the output of the condition circuit. Thus, only one selected condition circuit obtains a digital input.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7419380A JPS57704A (en) | 1980-06-04 | 1980-06-04 | Processing circuit for digital set value |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7419380A JPS57704A (en) | 1980-06-04 | 1980-06-04 | Processing circuit for digital set value |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57704A true JPS57704A (en) | 1982-01-05 |
Family
ID=13540089
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7419380A Pending JPS57704A (en) | 1980-06-04 | 1980-06-04 | Processing circuit for digital set value |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57704A (en) |
-
1980
- 1980-06-04 JP JP7419380A patent/JPS57704A/en active Pending
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