JPS5772430A - Phase synchronizng detecting circuit - Google Patents
Phase synchronizng detecting circuitInfo
- Publication number
- JPS5772430A JPS5772430A JP55148923A JP14892380A JPS5772430A JP S5772430 A JPS5772430 A JP S5772430A JP 55148923 A JP55148923 A JP 55148923A JP 14892380 A JP14892380 A JP 14892380A JP S5772430 A JPS5772430 A JP S5772430A
- Authority
- JP
- Japan
- Prior art keywords
- phase
- output
- signals
- circuit
- inputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To perform the phase synchronizing detection easily without malfunctions, by inserting a monostable multivibrator having a function which controls the transition of a signal to optionally vary the duty ratio of an output signal. CONSTITUTION:Even if two signals having different duty ratios are inputted in the same frequency and the same phase (region III), a monostable multivibrator 5 outputs signals A' and B' of the same phase in 1:1 duty ratio, and thses signals are inputted to an exclusive OR circuit 1, and an output L is outputted because of inputs of the same logical level. This output passes through an integrating circuit 2 and is compared with a reference voltage Vr by a boltage comparator 3 and has the synchronizing state detected. If input signals A and B having different frequencies as a region II, H and L are outputted alternately to the output of the exclusive OR circuit 1, and therefore, step out is detected by the voltage comparator 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55148923A JPS5772430A (en) | 1980-10-23 | 1980-10-23 | Phase synchronizng detecting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55148923A JPS5772430A (en) | 1980-10-23 | 1980-10-23 | Phase synchronizng detecting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5772430A true JPS5772430A (en) | 1982-05-06 |
Family
ID=15463677
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55148923A Pending JPS5772430A (en) | 1980-10-23 | 1980-10-23 | Phase synchronizng detecting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5772430A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005060103A3 (en) * | 2003-12-12 | 2005-12-29 | Qualcomm Inc | A phase locked loop that sets gain automatically |
| US7825706B2 (en) | 2002-06-28 | 2010-11-02 | Qualcomm Incorporated | Phase locked loop that sets gain automatically |
-
1980
- 1980-10-23 JP JP55148923A patent/JPS5772430A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7825706B2 (en) | 2002-06-28 | 2010-11-02 | Qualcomm Incorporated | Phase locked loop that sets gain automatically |
| WO2005060103A3 (en) * | 2003-12-12 | 2005-12-29 | Qualcomm Inc | A phase locked loop that sets gain automatically |
| EP2211467A1 (en) * | 2003-12-12 | 2010-07-28 | Qualcomm Incorporated | A phase locked loop that sets gain automatically |
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