JPS5776859A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5776859A
JPS5776859A JP55153226A JP15322680A JPS5776859A JP S5776859 A JPS5776859 A JP S5776859A JP 55153226 A JP55153226 A JP 55153226A JP 15322680 A JP15322680 A JP 15322680A JP S5776859 A JPS5776859 A JP S5776859A
Authority
JP
Japan
Prior art keywords
film
oxidation
layer
substrate
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55153226A
Other languages
Japanese (ja)
Inventor
Toru Mochizuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55153226A priority Critical patent/JPS5776859A/en
Publication of JPS5776859A publication Critical patent/JPS5776859A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0142—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations the dielectric materials being chemical transformed from non-dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To obtain the semiconductor device with a field oxide film without forming a bird-beak by forming a metallic silicide film, the speed of oxidation thereof is faster than silicon, in a field region of a silicon substrate and oxidizing the silicide film. CONSTITUTION:An Si3N4 film 2 is formed onto the P type Si substrate 1 through an SiO2 film 3 and patterned, the whole surface is coated with a metallic film 4' of Mo, etc. and thermally treated. Consequently, an exposing section of the substrate and the Mo layer are reacted and the MoSi2 film 5 is shaped, the remaining Mo layer 4' is removed, and the MoSi2 layer 5 is changed into an oxide film through thermal oxidation and used as the field oxide film. Accordingly, the degree of integration is improved because oxidation in the lateral direction at the time of selective oxidation can be suppressed.
JP55153226A 1980-10-31 1980-10-31 Manufacture of semiconductor device Pending JPS5776859A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55153226A JPS5776859A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55153226A JPS5776859A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5776859A true JPS5776859A (en) 1982-05-14

Family

ID=15557807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55153226A Pending JPS5776859A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5776859A (en)

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