JPS5776866A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5776866A
JPS5776866A JP55153135A JP15313580A JPS5776866A JP S5776866 A JPS5776866 A JP S5776866A JP 55153135 A JP55153135 A JP 55153135A JP 15313580 A JP15313580 A JP 15313580A JP S5776866 A JPS5776866 A JP S5776866A
Authority
JP
Japan
Prior art keywords
film
sio2
manufacture
semiconductor device
degeneration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55153135A
Other languages
Japanese (ja)
Inventor
Masataka Shinguu
Kazuaki Yamanochi
Toru Inaba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55153135A priority Critical patent/JPS5776866A/en
Publication of JPS5776866A publication Critical patent/JPS5776866A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/662—Laminate layers, e.g. stacks of alternating high-k metal oxides

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent the degeneration of the surface of a silicon nitride film in the heat treatment at a high temperature of a semiconductor substrate by forming a SiO2 film on the surface of the silicon nitride film shaped onto the semiconductor substrate. CONSTITUTION:The SiO2 film 6 is formed on the surface of the Si3N4 film 3 selectively shaped onto the Si substrate 1 through a SiO2 layer 2 and oxidized, and plasma-etched. Accordingly, the degeneration of the surface of the Si3N4 film 3 resulting from the heat treatment at the high temperature can be prevented.
JP55153135A 1980-10-31 1980-10-31 Manufacture of semiconductor device Pending JPS5776866A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55153135A JPS5776866A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55153135A JPS5776866A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5776866A true JPS5776866A (en) 1982-05-14

Family

ID=15555759

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55153135A Pending JPS5776866A (en) 1980-10-31 1980-10-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5776866A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5424253A (en) * 1992-03-09 1995-06-13 Oki Electric Industry Co., Ltd. Method for manufacturing an inter-layer insulating film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5424253A (en) * 1992-03-09 1995-06-13 Oki Electric Industry Co., Ltd. Method for manufacturing an inter-layer insulating film

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