JPS5776873A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5776873A
JPS5776873A JP55152595A JP15259580A JPS5776873A JP S5776873 A JPS5776873 A JP S5776873A JP 55152595 A JP55152595 A JP 55152595A JP 15259580 A JP15259580 A JP 15259580A JP S5776873 A JPS5776873 A JP S5776873A
Authority
JP
Japan
Prior art keywords
silicon
film
mask
oxide film
covered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55152595A
Other languages
Japanese (ja)
Inventor
Hiroyasu Azuma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55152595A priority Critical patent/JPS5776873A/en
Publication of JPS5776873A publication Critical patent/JPS5776873A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials

Landscapes

  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To obtain a semiconductor device with small dimensions and a low base resistance without deteriorating its characteristics by a method wherein a high density base region and an emitter region are formed by self-alignment. CONSTITUTION:An N type Si substrate 11 is covered by a silicon oxide film 12 and the surface of the oxide film 12 is covered by a silicon nitride film 13. Then a polycrystalline silicon film 14 is selectively formed and using this silicon film 14 as a mask the silicon nitride film 13 is side-etched. Ionized boron is injected using the polycrystalline silicon film 14 as a mask and a high density base region 15 is formed onthe silicon substrate 11. Then after the polycrystalline silicon film 14 is removed, ionized boron is injected and a base region 16 is formed. Finally using the silicon nitride film 13 as a mask the surface of the silicon substrate 11 is covered with a silicon oxide film 17 and the silicon nitride film 13 and the silicon oxide film 12 are removed and phosphorus is added, so that an emitter region 19 is formed.
JP55152595A 1980-10-30 1980-10-30 Manufacture of semiconductor device Pending JPS5776873A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55152595A JPS5776873A (en) 1980-10-30 1980-10-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55152595A JPS5776873A (en) 1980-10-30 1980-10-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5776873A true JPS5776873A (en) 1982-05-14

Family

ID=15543861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55152595A Pending JPS5776873A (en) 1980-10-30 1980-10-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5776873A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149055A (en) * 1983-02-12 1984-08-25 アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド Method of producing bipolar planar transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59149055A (en) * 1983-02-12 1984-08-25 アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド Method of producing bipolar planar transistor

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