JPS5779652A - Resin-sealed semiconductor device - Google Patents

Resin-sealed semiconductor device

Info

Publication number
JPS5779652A
JPS5779652A JP15534180A JP15534180A JPS5779652A JP S5779652 A JPS5779652 A JP S5779652A JP 15534180 A JP15534180 A JP 15534180A JP 15534180 A JP15534180 A JP 15534180A JP S5779652 A JPS5779652 A JP S5779652A
Authority
JP
Japan
Prior art keywords
resin
integrated circuit
semiconductor device
sealed semiconductor
thinnerization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15534180A
Other languages
Japanese (ja)
Inventor
Takashi Taniura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15534180A priority Critical patent/JPS5779652A/en
Publication of JPS5779652A publication Critical patent/JPS5779652A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07541Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To facilitate thinnerization and miniaturization of a package, by connecting an integrated circuit electrode and an external terminal via a through- hole of a printed circuit board. CONSTITUTION:A semiconductor integrated circuit 1 is mounted on a printed circuit board 6. A metal wire 4 and a conductive lead 7 are connected. The conductive lead 7 and an external terminal 9 are connected via a through-hole 8. The integrated circuit 1 is sealed with resin 5. This takes more external terminals. The resin-sealing on one surface enables thinnerization and miniaturization of a package.
JP15534180A 1980-11-05 1980-11-05 Resin-sealed semiconductor device Pending JPS5779652A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15534180A JPS5779652A (en) 1980-11-05 1980-11-05 Resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15534180A JPS5779652A (en) 1980-11-05 1980-11-05 Resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPS5779652A true JPS5779652A (en) 1982-05-18

Family

ID=15603767

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15534180A Pending JPS5779652A (en) 1980-11-05 1980-11-05 Resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS5779652A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61145893A (en) * 1984-12-20 1986-07-03 松下電器産業株式会社 Substrate for electronic component carrier
JPH0222886A (en) * 1988-07-11 1990-01-25 Nec Corp Hybrid integrated circuit
JPH02205055A (en) * 1989-02-02 1990-08-14 Nec Kyushu Ltd Resin-sealed semiconductor device
US5079673A (en) * 1989-04-06 1992-01-07 Mitsubishi Denki Kabushiki Kaisha Ic card module
US5241133A (en) * 1990-12-21 1993-08-31 Motorola, Inc. Leadless pad array chip carrier
US5355283A (en) * 1993-04-14 1994-10-11 Amkor Electronics, Inc. Ball grid array with via interconnection
JPH0878472A (en) * 1994-09-05 1996-03-22 Hitachi Cable Ltd Semiconductor device substrate and semiconductor device
US5592025A (en) * 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
US5736789A (en) * 1994-07-26 1998-04-07 Sgs-Thomson Microelectronics S.A. Ball grid array casing for integrated circuits
US5786639A (en) * 1997-01-09 1998-07-28 Mitsubishi Denki Kabushiki Kaisha Wiring member and lead frame having the same
US5841192A (en) * 1994-07-21 1998-11-24 Sgs-Thomson Microelectronics S.A. Injection molded ball grid array casing
US7531894B2 (en) 1994-12-29 2009-05-12 Tessera, Inc. Method of electrically connecting a microelectronic component
US9716075B2 (en) 2010-12-21 2017-07-25 Tessera, Inc. Semiconductor chip assembly and method for making same

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61145893A (en) * 1984-12-20 1986-07-03 松下電器産業株式会社 Substrate for electronic component carrier
JPH0222886A (en) * 1988-07-11 1990-01-25 Nec Corp Hybrid integrated circuit
JPH02205055A (en) * 1989-02-02 1990-08-14 Nec Kyushu Ltd Resin-sealed semiconductor device
US5079673A (en) * 1989-04-06 1992-01-07 Mitsubishi Denki Kabushiki Kaisha Ic card module
US5241133A (en) * 1990-12-21 1993-08-31 Motorola, Inc. Leadless pad array chip carrier
US5592025A (en) * 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
US5355283A (en) * 1993-04-14 1994-10-11 Amkor Electronics, Inc. Ball grid array with via interconnection
US5841192A (en) * 1994-07-21 1998-11-24 Sgs-Thomson Microelectronics S.A. Injection molded ball grid array casing
US5736789A (en) * 1994-07-26 1998-04-07 Sgs-Thomson Microelectronics S.A. Ball grid array casing for integrated circuits
EP0694965B1 (en) * 1994-07-26 1999-06-02 STMicroelectronics S.A. BGA package for integrated circuits and method for manufacturing
JPH0878472A (en) * 1994-09-05 1996-03-22 Hitachi Cable Ltd Semiconductor device substrate and semiconductor device
US7531894B2 (en) 1994-12-29 2009-05-12 Tessera, Inc. Method of electrically connecting a microelectronic component
US5786639A (en) * 1997-01-09 1998-07-28 Mitsubishi Denki Kabushiki Kaisha Wiring member and lead frame having the same
DE19734794B4 (en) * 1997-01-09 2004-09-23 Mitsubishi Denki K.K. A lead frame with a plurality of wiring parts for use in a semiconductor device
US9716075B2 (en) 2010-12-21 2017-07-25 Tessera, Inc. Semiconductor chip assembly and method for making same

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