JPS5787232A - Input signal reading circuit - Google Patents
Input signal reading circuitInfo
- Publication number
- JPS5787232A JPS5787232A JP55163141A JP16314180A JPS5787232A JP S5787232 A JPS5787232 A JP S5787232A JP 55163141 A JP55163141 A JP 55163141A JP 16314180 A JP16314180 A JP 16314180A JP S5787232 A JPS5787232 A JP S5787232A
- Authority
- JP
- Japan
- Prior art keywords
- value
- low
- counter
- reading circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/125—Discriminating pulses
- H03K5/1252—Suppression or limitation of noise or interference
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To eliminate a chattering noise stably, by sampling and counting input data and by outputting a low output when the count value is higher than a constant value and by outputting a high output when it is lower than the constant value and by supplying these outputs to a reading circuit. CONSTITUTION:After reset by a reset pulse 6 from a timing pulse generating circuit 2, an integral counter 1 starts counting the section of input data 4 by sampling clocks 5. When data 4 is high, a high value is much considerably at the sampling time even if a low value is generated by a noise or the like, and the value of the counter 1 exceeds a constant value, and therefore, an integral output 7 outputs a high signal to a reading circuit 3 till the generation of a read timing pulse 8, and simultaneously, counting of the counter 1 is inhibited through a gate. When data 4 is low, a low value is much considerably at the sampling time even if a high section is generated by a noise or the like, and the count value of the counter 1 does not exceed the constant value, and therefore, the integral output is low stably.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55163141A JPS5787232A (en) | 1980-11-18 | 1980-11-18 | Input signal reading circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55163141A JPS5787232A (en) | 1980-11-18 | 1980-11-18 | Input signal reading circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5787232A true JPS5787232A (en) | 1982-05-31 |
Family
ID=15767985
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55163141A Pending JPS5787232A (en) | 1980-11-18 | 1980-11-18 | Input signal reading circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5787232A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62214715A (en) * | 1986-03-15 | 1987-09-21 | Fuji Facom Corp | Digital filter circuit system |
| EP0343317A3 (en) * | 1988-05-26 | 1990-01-24 | Hitachi, Ltd. | Filter circuit |
| US6008672A (en) * | 1996-11-11 | 1999-12-28 | Nec Corporation | Input signal reading circuit having a small delay and a high fidelity |
-
1980
- 1980-11-18 JP JP55163141A patent/JPS5787232A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62214715A (en) * | 1986-03-15 | 1987-09-21 | Fuji Facom Corp | Digital filter circuit system |
| EP0343317A3 (en) * | 1988-05-26 | 1990-01-24 | Hitachi, Ltd. | Filter circuit |
| US4961014A (en) * | 1988-05-26 | 1990-10-02 | Toshiro Kasahara | Filter circuit utilizing reversible counter for generating a satisfactory hysteresis |
| US6008672A (en) * | 1996-11-11 | 1999-12-28 | Nec Corporation | Input signal reading circuit having a small delay and a high fidelity |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| MY105848A (en) | Antimetastable state circuit. | |
| JPS5787232A (en) | Input signal reading circuit | |
| CH630501B (en) | TIME CORRECTION-ADJUSTMENT CIRCUIT FOR ELECTRONIC WATCH PART, ESPECIALLY ELECTRONIC BRACELET WATCH. | |
| JPS5428669A (en) | Noise measuring circuit | |
| JPS56166654A (en) | Pulse stuffing synchronizer | |
| JPS5465582A (en) | Judgement circuit of chattering time | |
| JPS56138330A (en) | Noise rejector for constant input judgement | |
| JPS54126006A (en) | Information service device | |
| JPS5489714A (en) | Data detector | |
| JPS56140598A (en) | Error control system of memory device | |
| JPS55132155A (en) | Phase control circuit | |
| JPS5689144A (en) | Asynchronous type data receiving device | |
| JPS56103558A (en) | Bit buffer circuit | |
| JPS5589783A (en) | Discrimination circuit for time casting signal | |
| JPS575136A (en) | Timing generating circuit | |
| JPS5414663A (en) | Pulse signal reader | |
| JPS57136279A (en) | Reader of punched tape | |
| JPS5440411A (en) | Signal inspecting circuit | |
| JPS56107191A (en) | Time interval measurement device | |
| JPS5723320A (en) | Trigger pulse generating circuit | |
| JPS53143375A (en) | Electronic time signal circuit | |
| JPS57103115A (en) | Control circuit of magnetic recorder and reproducer | |
| JPS5286758A (en) | High accurate digital delay circuit | |
| KR900001150A (en) | PCM data generation circuit | |
| JPS57109047A (en) | Comparing and discriminating device for data |