JPS5489714A - Data detector - Google Patents

Data detector

Info

Publication number
JPS5489714A
JPS5489714A JP15955977A JP15955977A JPS5489714A JP S5489714 A JPS5489714 A JP S5489714A JP 15955977 A JP15955977 A JP 15955977A JP 15955977 A JP15955977 A JP 15955977A JP S5489714 A JPS5489714 A JP S5489714A
Authority
JP
Japan
Prior art keywords
block
specified number
gate
owing
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15955977A
Other languages
Japanese (ja)
Inventor
Yoshiaki Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP15955977A priority Critical patent/JPS5489714A/en
Publication of JPS5489714A publication Critical patent/JPS5489714A/en
Pending legal-status Critical Current

Links

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE: To prevent reading of ineffective clocks owing to noise, etc. by outputting block signals after counting of a specified number since input signal was applied.
CONSTITUTION: When the input signal having been read is applied to terminal IT 1, a counter CNT which counts a specified number through an OR gate OR 1, NOR gate NOR 1 starts counting. Each time when this counter CNT counts a specified number, an FF 16 is inverted by the NAND output from a NAND gate ND 2, by which an AND gate AG 1 is opened. This causes the counter CNT to be reset and the inversion output of the FF to become a block signal, thus reading of the data is accomplished. Hence, no block signals are produced at the inputting of the read signal owing to noise, etc. of the nonblock part and reading of the effective block is thus prevented. A block which has missing of signals of less than specified number owing to segmenting of the data block by the burst of the clock signal may also be read in the similar manner.
COPYRIGHT: (C)1979,JPO&Japio
JP15955977A 1977-12-27 1977-12-27 Data detector Pending JPS5489714A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15955977A JPS5489714A (en) 1977-12-27 1977-12-27 Data detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15955977A JPS5489714A (en) 1977-12-27 1977-12-27 Data detector

Publications (1)

Publication Number Publication Date
JPS5489714A true JPS5489714A (en) 1979-07-17

Family

ID=15696374

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15955977A Pending JPS5489714A (en) 1977-12-27 1977-12-27 Data detector

Country Status (1)

Country Link
JP (1) JPS5489714A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4461541A (en) * 1982-03-25 1984-07-24 The United States Of America As Represented By The Secretary Of The Army Stereoscopic video image display

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4461541A (en) * 1982-03-25 1984-07-24 The United States Of America As Represented By The Secretary Of The Army Stereoscopic video image display

Similar Documents

Publication Publication Date Title
JPS53114651A (en) Electronic circuit
JPS56106457A (en) Extracting system of clock signal
JPS5489714A (en) Data detector
JPS53120512A (en) Digital signal processing unit
JPS5513585A (en) Frame synchronizing circuit
JPS55166749A (en) Decoder circuit
JPS5787232A (en) Input signal reading circuit
JPS5689144A (en) Asynchronous type data receiving device
JPS5433060A (en) Printing recorder
JPS57124928A (en) Edge detection circuit
JPS5332070A (en) Pulse integrating recorder
JPS57136279A (en) Reader of punched tape
JPS55121544A (en) Multiplication rounding circuit
JPS55123719A (en) Data input circuit
JPS53143375A (en) Electronic time signal circuit
JPS5665319A (en) Data pulse sampler
JPS56131424A (en) Digital diferential restrictor
JPS5335468A (en) Noise elmination system of digital signal
JPS56161738A (en) Synchronizing clock generating system
JPS5286758A (en) High accurate digital delay circuit
JPS5621421A (en) Double-precision counter circuit
JPS55125474A (en) Clock device
JPS5560892A (en) Electronic time sounding circuit
JPS5793755A (en) Signal discriminating system
JPS5430737A (en) Rule display system