JPS5792986A - Picture processing device - Google Patents

Picture processing device

Info

Publication number
JPS5792986A
JPS5792986A JP16840580A JP16840580A JPS5792986A JP S5792986 A JPS5792986 A JP S5792986A JP 16840580 A JP16840580 A JP 16840580A JP 16840580 A JP16840580 A JP 16840580A JP S5792986 A JPS5792986 A JP S5792986A
Authority
JP
Japan
Prior art keywords
signal
inputted
circuit
outline
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16840580A
Other languages
Japanese (ja)
Inventor
Takashi Uchiyama
Susumu Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16840580A priority Critical patent/JPS5792986A/en
Publication of JPS5792986A publication Critical patent/JPS5792986A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40—Picture signal circuits
    • H04N1/409—Edge or detail enhancement; Noise or error suppression

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Closed-Circuit Television Systems (AREA)

Abstract

PURPOSE:To obtain the address of an outline in a high speed with a simple constitution, by obtaining a signal of the outline except the inside and the background of a material from input signals and output signals of plural delay circuits. CONSTITUTION:The video signal of an ITV cemera 1 is inputted to a comparator 2 and is converted to a binary signal. This binary signal is inputted to delay circuits 3 and 4 in order. Delay circuits 3 and 4 are operated by clocks from a synchronizing control circuit 7. The input signal of the delay circuit 3 and the output signal of the delay circuit 4 are inputted to a NAND circuit 5, and the output of the NAND circuit 5 and the input signal of the delay circuit 4 are inputted to an AND circuit 6, thus obtaining an outline signal. Horizontal and vertical synchronizing clocks from the synchronizing control circuit 7 are inputted to an address counter 8 of picture elements, and address outputs of picture elements corresponding to the outline signal are taken out.
JP16840580A 1980-11-29 1980-11-29 Picture processing device Pending JPS5792986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16840580A JPS5792986A (en) 1980-11-29 1980-11-29 Picture processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16840580A JPS5792986A (en) 1980-11-29 1980-11-29 Picture processing device

Publications (1)

Publication Number Publication Date
JPS5792986A true JPS5792986A (en) 1982-06-09

Family

ID=15867507

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16840580A Pending JPS5792986A (en) 1980-11-29 1980-11-29 Picture processing device

Country Status (1)

Country Link
JP (1) JPS5792986A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6251889A (en) * 1985-08-30 1987-03-06 Matsushita Electric Ind Co Ltd Picture separating device
JPH06233326A (en) * 1993-02-03 1994-08-19 Rohm Co Ltd Three-dimensional video system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6251889A (en) * 1985-08-30 1987-03-06 Matsushita Electric Ind Co Ltd Picture separating device
JPH06233326A (en) * 1993-02-03 1994-08-19 Rohm Co Ltd Three-dimensional video system

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