JPS58138056A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the assembly yield without the expansion of solder over the entire surface of a metallized layer on an insulation substrate, and without obstructing to the connection of metallic wires when a semiconductor pellet is fused by a method wherein a matellized layer the solder thereof is difficult to be made wet is formed between the part to fuse a semiconductor pellet and the part to connect a metallic wire on the surface of the metallized layer of the insulation substrate. CONSTITUTION:In the insulation substrate 10', a region 18 is isolated from a region 20 by a structure wherein an Au plated layer at the part of a region 19 is removed resulting in the exposure of an Ni plated layer 16. The semiconductor pellet 9 is fused on the region 18 by using Au-Si eutectic solder, and the metallic fine wire is connected to the region 20. The region 18 and the region 20 are electrically connected by the Ni plated layer 16. Since the Ni plated layer 16 is difficult to be wet by solder, the solder does not expand to the region 20 when the semiconductor pellet is fused on the region 18. Thereby, an unfavorableness does not generate when the metallic fine wire is connected to the region 20.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device using an insulating substrate, such as a semiconductor device in which a transistor can be used in a common emitter structure.

FIG. 1 shows the internal structure of a commonly used common emitter transistor. This configuration will be explained together with an assembly method.

A semiconductor pellet (e.g., a stretched pellet) 9 is fused onto an insulating substrate (e.g., Be04aii) 10 having one surface metallized using a solder (e.g., Au-8i eutectic) 11.

Next, the insulating substrate 10 with the semiconductor pellet opening fused thereto is fused to the header 1 using solder 12. Next, the emitter formed on the semiconductor pellet 9 is bonded using a thin metal wire (for example, Au fastening) 1. The electrode and header 1 are electrically connected.

Furthermore, using the thin metal Is6, the base electrode and the external electrode 3 formed on the semiconductor pellet 9 are connected to the thin metal wire 8.
The surface of the insulating substrate 100 and the external electric currents
Continue.

The external electrode 3 serves as a pace terminal, the external electrode 4 serves as a collector terminal, and the body of the header 1 and the external electrode 5 serve as an emitter terminal. Next, attach the metal cap 13 to the header lK11.
1 contact, and the semiconductor device is completed. Note that 2 is a glass layer for insulating the external electric circuit Its, 4 from the header 1.

The transistors having the conventional structure described above have the following problems. That is, ■ semiconductor pellet 9
When the solder 11 is fused onto the insulating base 10, the solder 11 may spread widely on the insulating base 10 whose surface is metallized, and even spread to the area where the metal layer wire 8 is to be connected.

■ When Au-83 eutectic solder 11 is melted, Au
The Si in the -8i eutectic oxidizes, and an oxide film is formed on the solder surface, making it impossible to connect fine metal wires by thermocompression bonding, which is a commonly used method for connecting metal layer wires. Konoyo 5
When the Kau-8J eutectic solder 11 spreads, the thin metal wire w! This can lead to reliability problems such as a decrease in assembly yield, or disconnection due to insufficient bonding strength of the thin metal wires.

The present invention improves the metallization layer formed on the surface of an insulating substrate in order to eliminate these problems, improve the assembly yield of semiconductor devices, and improve reliability.

FIGS. 2(a) and 2(b) show an insulating substrate 1G having a conventional structure.

The conventional insulating substrate 10 is a BeO porcelain plate 14 which is an insulating material.
KMO-Mn layer 15. Furthermore, &CNi plating layer 16. Furthermore, when the Au plating layer 11 is formed, both surfaces are metallized. The insulating substrate 10 having a conventional structure has metallized layers as described above formed on the entire front and back surfaces.

On the other hand, in the insulating substrate 10' according to the present invention shown in FIGS. 3(a) and 3(b) K, the layer structure is the same as that in FIG. 2, but the Au plating layer 11 in the region 19 is removed and the Ni
The structure is such that the plating layer 16 is exposed, and the regions 18 and 2 are
0 is separated. A semiconductor pellet 111 is attached to the region 1@ using Mu-8i eutectic solder 11, and a thin metal wire 8 is connected to the region 20.

\Region 1@ and area 20 are electrically connected by the N1 plating layer 1s, which is equivalent to the conventional structure shown in FIG. 2.

Further, since the Ni plating layer 16 is not easily wetted by the solder 11, when the semiconductor pellet 9 is fused in the region 18, the solder 11 does not spread in the region 2@t. Therefore, when IIK connects the metal layer 416 to the region 20, the above-described problems do not occur.

As described in 5 above, the present invention forms a conductive metallized layer between the metallized area using solder and the metallized area connecting the metal layer line 8, This is a semiconductor device characterized by separating inner regions.

In the above embodiment, the Ni plating layer 16 used to form the metallized layer of the insulating substrate 10' was used as a conductive metallized layer that is difficult to wet with solder, but it may be formed of other metals. In addition, in order to lower the electrical resistance, we added KAu-8 on the region 1s.
i May be overlaid with a metallization layer that is not wetted by eutectic solder.

As described above in detail, the present invention is designed to prevent solder from getting wet between the part of the surface of the metallized layer of the insulating substrate where the semiconductor bullet is fused and the part where the metal layer wire is connected.
Since a thick metallization layer is formed, when the semiconductor bullet is fused, the solder does not spread over the entire surface of the metallization of the insulating substrate and does not interfere with the connection of the metal layer wires, reducing the yield of 7 assemblies. There are advantages that can be improved.

[Brief explanation of drawings]

Figures 1 (a) and (b) are a plan view and a front view showing a high frequency semiconductor device, Figure 2 Ca) and (b) are a plan view and a side view showing a conventional insulating substrate, and Figure 3 (a ). (b) is a plan view and a side view of an insulating substrate showing an embodiment of the present invention. In the figure, 1 is a header, 2 is a glass layer, S, 4. S is an external electrode, s, r, s are thin metal wires, ■ is a semiconductor pellet), 10
' is an insulating base, 11.12 is solder, 13 is a cap,
14 is a BeO porcelain plate, 1s is a Mo-Mo layer, 16 is an N
1 plating layer, 11 is a mu-U plating layer, 18 is a region for welding the semiconductor pellet, 1- is a region of the metal layer that is not wetted by solder, and 2o is a region for connecting thin metal wires. Note that the same reference numerals in the mouth indicate the same or equivalent parts. Agent Makoto Kuzuno (1 other person) Figure 1 (a) (b) Figure 2 (a) (a)

Claims (1)

[Claims] A metallized layer is formed on the surface of an insulating substrate, a semiconductor pellet is fused to this metalized layer, and a thin metal wire is used to connect the surface of the metallized layer of the insulating substrate to which the semiconductor pellet is fused and an external lead. In the semiconductor device to be connected by the metallized layer of the insulating substrate, there is good electrical conductivity between the part of the surface of the metallized layer of the insulating substrate where the semiconductor pellet is fused and the part where the metal JII# is connected, and the solder is not wetted. A semiconductor device characterized by forming a thick metallized layer.