JPS581796B2 - Envelope waveform generator for electronic musical instruments - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an envelope waveform generator for an electronic musical instrument.

In conventional electronic musical instruments, the envelope speed, which indicates the rise (attack) and fall (release) speeds of the envelope of musical sound signals, is controlled by applying the charging/discharging voltage of a time constant circuit consisting of a capacitor and resistor to a gate circuit. , a method of controlling the opening and closing of this gate circuit is generally used.

However, with this method, arbitrary envelope control cannot be expected and integration is also difficult.

Another method is to directly read out the sampled envelope waveform storage circuit.

However, with this method, the storage capacity becomes very large and the number of bits increases accordingly.Furthermore, in order to provide different envelope waveforms for multiple tones, it is necessary to provide a large number of envelope waveform storage circuits or to perform multiple reading. Become.

Furthermore, since quantization noise, which is a drawback of PCM (pulse code modulation) waveforms, occurs, a large-capacity storage circuit is required to reduce this effect.

Furthermore, conventionally, the envelope speed has been assumed to be constant regardless of the pitch of the sound, but in order to obtain a natural sound, it is necessary to make high sounds fast and low sounds slow.

The present invention is intended to solve these drawbacks and problems, and its purpose is to provide an envelope waveform generator with a simple configuration that can generate any envelope waveform of an electronic musical instrument at a natural envelope speed with low quantization noise. The goal is to provide the following.

In order to achieve the above object, an envelope waveform generator of the present invention includes a circuit that changes the speed of an envelope according to a musical tone frequency by converting an envelope clock into an evening lock frequency having a pulse density corresponding to the musical tone frequency, and the circuit. A circuit that converts the output clock of the circuit into a clock frequency having a pulse density corresponding to the attack, sustain, and release of the key switch and controls the speed of the envelope, and a function that changes the output every fixed number of pulses of the output clock of the circuit. A pulse density function generator consisting of a generator and a pulse density multiplier that controls the pulse density of a clock by the output of the function generator, and counts the output pulses of the pulse density function generator and envelops the cumulative sum of the pulse density function. This device is characterized by being equipped with an envelope counter that outputs a waveform.

The present invention will be described in detail below with reference to examples.

To briefly describe the principle of the present invention, a natural envelope speed is obtained by changing the density of the clock for generating the envelope waveform according to the musical tone, and furthermore, by driving a counter by changing the pulse density, the envelope waveform is generated. is a linear approximation to keep the quantization noise low.

FIG. 1 is a block diagram of an embodiment of the invention based on the principles described above.

In the figure, the envelope clock, ie, the reference clock for determining the maximum or minimum envelope speed, is input from the generator 1 to AND1.

If the key switch SW1 is now pressed, the flip-flop (
FF1) is set and its Q output outputs “1” and AD
Enter 1.

The envelope clock is therefore input to the rate multiplier, ear 5, or pulse density multiplier.

This rate multiplier 5 is a circuit such as a synchronous 6-bit binary rate multiplier of type SN7497 manufactured by TI (Texas Instruments), and controls the pulse density of the clock by the output of a predetermined function generator. It is.

The key switch SW1 is one of many switches in the key switch OR circuit 2, and its output is manually encoded by an encoder 3, and the output of the encoder 3 is input to a code conversion circuit 4, which converts it into a rate multiplier. Control the output pulse density of 5.

Here, it is best to change the envelope clock frequency in accordance with each key, but in order to reduce the number of control bits, and even when the human ear hears it, it is not necessary to have such precision.

Therefore, it is sufficient to change it in units of the first octave.

For example, 7 bits are required to vary the pulse density for all keys across 7 octaves, whereas 3 pits are required to vary it every octave.

Therefore, in this embodiment, the output of the key switch OR circuit 2 is divided into octaves, and the encoder 3 outputs an octave code.

In the code conversion circuit 4, the output pulse density of the rate multiplier 5 at the lowest octave is set to K% density with respect to the input envelope clock, and at the highest octave, the output pulse density of the rate multiplier 5 is set to K% density with respect to the input envelope clock.
% pulse density, and the pulse density is K%.
A code conversion circuit 4 provides data for controlling the rate multiplier 5 so that the rate multiplier 5 changes from 100% to 100% depending on the octave.

In this case, if the change is assumed to be linear, it will be as shown in Figure 2, and K
If it is set to 50%, the output of the code conversion circuit will be 4 bits if it is divided into 8 stages as shown.

Moreover, it is easy to set other appropriate values rather than a linear change as shown in FIG.

The output envelope clock of rate multiplier 5 having a pulse density corresponding to this octave is given to rate multiplier 7.

For this rate multiplier 7, attack sustain release (ASR) pulse density specification circuit 6
The output of is given.

The ASR pulse density designation circuit 6 designates the pulse density of the envelope clock at the time of attack, sustain, and release of the key switch.

The ASR pulse density designation circuit 6 has the output of SW1 and NAN.
The output of D1 is given.

SW1 output is 1 during attack and sustain, and N
The output of AND1 outputs 0 during sustain.

Based on the combination of these outputs, the output pulse density of the rate multiplier 7 during attack, sustain, and release is specified.

4 bits are input to this rate multiplier 7.
...15) is controlled.

Specify 100% when attacking.

At the time of attack, the rate multiplier 7 outputs an envelope clock with the same pulse density as the output of the rate multiplier 5, which is given to the Hals density function unit 10, and in this embodiment, the rate multiplier 7 outputs an envelope clock with the same pulse density as the output of the rate multiplier 5. Use a circuit that generates a series of pulse densities.

This circuit 10 is composed of an octal ring counter 9 and a rate multiplier 8, and controls the number of output pulses to 128 to 1 for the number of input pulses of 256.

In other words, first specify 1000000 by incrementing the ring counter every 256 input pulses, and the pulse density becomes 128/256 x 100%.Next, specify 100000, and the pulse density is 1/2 of that, 64/256. ×100%
The number of output pulses changes to 128, 64, 32, . . . , ■ for every 256 input pulses.

Also, instead of a ring counter, a shift register may be used in which "1" is written in increments of one bit.

The output of this rate multiplier 8 is given to an envelope counter 11.

The envelope counter 11 is a counter for generating a digital envelope waveform, and an up-down counter is used in the embodiment.

The envelope counter 11 is set to “1” by the output of SW1.
The up counter n=8, and when k reaches 8, that is, when the ring counter 9 specifies 00000001, the envelope counter 11 counts 256, all become "1", and the NAND1 outputs "O2".

The output of NAND1 is given to the ASR pulse density designation circuit 6, and the output of the rate multiplier 7 is inhibited.

This stops the attack and becomes sustain.

Here, NAND1 determines a steady-state value, and an appropriate steady-state value may be set.

When the key switch SW1 is opened, "0" is input to the ASR pulse density designation circuit 6, and the appropriate multiplier 7 of the release outputs nR pulses for the 16 input pulses.

This output is input to the rate multiplier 8 of the pulse density function generator 10.

Currently, the output of SW1 is one-shot multivibrator 1
2, and the ring counter 9 is passed through OR1.
is reset and returns to the state of 10000000.

Furthermore, the SW1 output is input to the amplifier down designation of the envelope counter 11 to designate down counting.

The pulse density function generator 10 again operates in the same way as the attack, outputting 2128, 64, . Count.

When envelope counter 11 becomes 0, NOR1 becomes "
1” and is input to the one-shot multivibrator 13.

The output of the one-shot multivibrator 13 is rate multipliers 5, 7, 8 and flip-flop (FF1).
and reset the ring counter 9, and the output Q of FF1 becomes "
0”, and the envelope clock is inhibited by AND1.

The output of the envelope counter 11 is transferred to the D/A converter 1.
FIG. 3a shows the waveform after analog conversion using 4.

Note that even if the key is released during an attack, the ring counter 9 is reset, the pulse starts, and the envelope operation stops when the release ends due to the output of NOR1.

Further, even if the key is pressed again during release, the one-shot multivibrator with rising and falling starts the attack again from the current pulse density, and when the envelope operation reaches a steady value due to the output of NAND1, it becomes sustain.

In the pulse density function generator of this embodiment, the geometric series Aj+1
=Aj/2 delta PCM envelope data was converted into PNM (pulse number modulation) data by a pulse density multiplier to generate pulse density.

However, in another embodiment, as shown in FIG.
Delta PCM of the arithmetic series expressed by the formula =A3+B
It is also easy to convert envelope data into PNM data to generate pulse density, and the envelope waveform is output as the sum of an arithmetic series.

That is, as shown in the broken line pulse density function unit 10 in the figure, an adder 21 and a latch circuit 22 are connected in a loop instead of the ring counter described above, and Ai is put into the adder 21 and B is added. From the latch circuit 22, Aj+1=Aj+B
The pulse density was generated as follows.

Various other functions are also used.

In this embodiment, as shown in FIG. 3a, the PCM waveform is a staircase waveform, but in the present invention, the waveform is linearly approximated, and the quantization noise is the same as shown in FIG. 3b. In contrast to the quantization noise of the PCM waveform shown in FIG. b (2), in the present invention, the quantization noise is one-step quantization noise shown in FIG.

As explained above, according to the present invention, an envelope clock for forming an envelope waveform having a speed corresponding to the frequency of a musical tone signal can be obtained by pulse density conversion. It becomes possible to produce the effect of

Furthermore, since envelope data is obtained by functional calculation without using a memory element, it is suitable for integration.

In this case, by feeding the PCM waveform data to a rate multiplier to generate PNM (pulse number modulation) waveform data, the conventional PCM envelope waveform can be linearly approximated, and the quantization noise, which is considered a drawback of digital, can be reduced to the lowest level. The noise can be reduced to only one step of noise.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram showing the configuration of an embodiment of the present invention, FIGS. 2 and 3 are explanatory diagrams of characteristics of main parts of the embodiment of FIG.
The figure is an explanatory diagram showing the configuration of another embodiment of the present invention, in which 1 is an envelope clock generator, 2 is a key switch OR circuit, 3 is an encoder, 4 is a code converter, and 5 is a rate multiplier. , 6 is an attack/sustain/release pulse density designation circuit, 7 and 8 are rate multipliers, 9 is a ring counter, 10.10' is a pulse density function generator, 11 is an envelope counter, 12.13
14 is a D/A converter, 21 is an adder, and 22 is a latch circuit.

Claims (1)

[Claims] 1. A circuit that changes the speed of the envelope according to the musical tone frequency by converting the envelope clock to a clock frequency having a pulse density corresponding to the musical tone frequency;
A circuit that converts the output clock of the circuit to a clock frequency having a pulse density corresponding to the attack, sustain, and release of the key switch and controls the speed of the envelope, and changes the output every fixed number of pulses of the output clock of the circuit. and a pulse density multiplier that controls the pulse density of the clock by the output of the function generator, and counts the output pulses of the pulse density function generator and calculates the cumulative sum of the pulse density function. 1. An envelope waveform generator for an electronic musical instrument, comprising an envelope counter that outputs an envelope waveform as an envelope waveform. 2 Output the delta PCM envelope data from the function generator, and output the delta PCM envelope data by the pulse density multiplier.
2. An envelope waveform generator for an electronic musical instrument according to claim 1, characterized in that the envelope data of the PNM data is converted into PNM data.