JPS5818954A - Manufacture of hybrid integrated circuit - Google Patents
Manufacture of hybrid integrated circuitInfo
- Publication number
- JPS5818954A JPS5818954A JP56118032A JP11803281A JPS5818954A JP S5818954 A JPS5818954 A JP S5818954A JP 56118032 A JP56118032 A JP 56118032A JP 11803281 A JP11803281 A JP 11803281A JP S5818954 A JPS5818954 A JP S5818954A
- Authority
- JP
- Japan
- Prior art keywords
- film
- resist
- capacitor
- alpha
- ceramic substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は混成集積回路の製造方法に関するものである。[Detailed description of the invention] The present invention relates to a method of manufacturing a hybrid integrated circuit.
近年、タン′タル、ニオブ、チタン等の弁金属、二
とりわけタンタルを用いたベータタンタルコン1ンサが
広く実用化されているが、その理由は、弁金属が陽極酸
化法によシ容易に誘電体酸化物に変換可能であシ、誘電
体酸化物が物理的、化学的にきわめて安定でアシ、また
、誘電体酸化膜厚も陽極酸化条件により再現性よく制御
可能なため、高信頼性を有する容量精度のきびしい薄膜
コンデンサを容易に実現できるからである。In recent years, beta-tantalum capacitors using valve metals such as tantalum, niobium, and titanium, especially tantalum, have been widely put into practical use. The dielectric oxide is extremely stable physically and chemically, and the dielectric oxide film thickness can be controlled with good reproducibility by changing the anodizing conditions, resulting in high reliability. This is because a thin film capacitor with strict capacitance accuracy can be easily realized.
混成集積回路では、回路形成彼、個別部品の搭載、ある
いは外部リード接続には、熱圧着ボンディング法がしば
しば用いられる。熱圧着ボンディングをするためには、
少くとも圧着部分はグレージングなどのない基板素面で
なければならない。In hybrid integrated circuits, thermocompression bonding methods are often used to form circuits, mount individual components, or connect external leads. To perform thermocompression bonding,
At least the crimping part must be on the bare surface of the substrate without glazing.
それは、グレーズ面では被着金属層の密着度が十分でな
いからである。また、CRラワンース混成集積回路の場
合、抵抗体のΩ/口、抵抗温度係数等、回路機能特性か
ら、アングレーズ上に形成せざるを得ない場合がある。This is because the adhesion of the deposited metal layer to the glazed surface is insufficient. Further, in the case of a CR laance hybrid integrated circuit, it may be necessary to form it on an anglaise due to the circuit function characteristics such as the resistor's Ω/portion and resistance temperature coefficient.
しかしながら、ベータタンタルコンデンサは熱的影譬を
受は易く、耐熱性が劣るという欠点があるため、前述の
如く、高信頼性を得るためには、コンデンサをグレーズ
上に形成する必要がある。However, beta-tantalum capacitors have the disadvantage of being easily affected by heat and having poor heat resistance, and therefore, as mentioned above, in order to obtain high reliability, it is necessary to form the capacitor on a glaze.
したがって、セラミック基板は、所定の一部分にグレー
ズを印刷したいわゆる部分グレーズ基板を使用せざるを
得ない。このことは、基板が高価になシ、薄膜コンデン
サの単価が上がるなど材料的な欠点。また、グレーズが
数μmの厚さを有するため、アングレーズ表面に対し段
差を生ずる。このことは、フォトマスクと基板面とを密
着させたとき、グレーズ表面はマスクと密着するが、ア
ングレーズ面とフォトマスクの間にすき間が生じ、無光
量の均一性Kかけ、設計のパターン幅に対し、再現性が
得られない。上記の如く、部分グレーズ基板を使用する
ことは、材料費の高騰ばかシでなく、歩留りの低下9回
路設計の自由度の束縛等の欠点がある。Therefore, as a ceramic substrate, it is necessary to use a so-called partially glazed substrate in which a glaze is printed on a predetermined portion. This has material disadvantages such as the expensive substrate and the increased unit price of thin film capacitors. Further, since the glaze has a thickness of several micrometers, a step is created with respect to the anglaze surface. This means that when the photomask and the substrate surface are brought into close contact, the glaze surface will be in close contact with the mask, but a gap will be created between the unglazed surface and the photomask, which will reduce the uniformity of the amount of light, K, and the designed pattern width. However, reproducibility cannot be obtained. As described above, the use of a partially glazed substrate has disadvantages such as an increase in material costs, a decrease in yield, and a restriction on the degree of freedom in circuit design.
本発明の目的は、基板面グレーズによる上述の欠点をな
くすとともに、十分な耐熱性を備えた高信頼度のタンタ
ルコンデンサを形成する工程を含む混成集積回路の製造
方法を提供するにある。SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for manufacturing a hybrid integrated circuit that eliminates the above-mentioned drawbacks due to substrate surface glaze and includes a process for forming a highly reliable tantalum capacitor with sufficient heat resistance.
本発明方法では、セラミック基板素面に直接アルファタ
ンタルコンデンサを形成する工程を含んでいる。The method of the present invention includes the step of forming an alpha tantalum capacitor directly on the bare surface of a ceramic substrate.
アルファタンタルコンデンサは、耐熱性の問題から、従
来グレーズ上に形成せざるを得なかったベータタンタル
コンデンサに比べて耐熱性に優れているため、グレーズ
などのないセラミ、り基板素面にそのまま形成しても、
高い信頼性が保持される。Alpha tantalum capacitors have superior heat resistance compared to beta tantalum capacitors, which conventionally had to be formed on a glaze due to heat resistance issues, so they can be formed directly on the bare surface of a ceramic or substrate without a glaze. too,
High reliability is maintained.
つぎに本発明を実施例により説明する。Next, the present invention will be explained by examples.
第1図(a)ないしくk)は本発明の一実施例の製造工
程を示す断面図である。まず直流2極スパツタ装置を5
X10 Torr以上の真空度に排気した後、外部か
らアルゴンガスを導入し、数十mTorrのアルゴンガ
ス雰囲気を作り、さらに窒・素ガスを導入する。そして
タンタル陰極板と十分に洗浄したセラミック基板を3〜
10信の距離に保ち、両電極間で異常グロー放電させて
、第1図(、)に示すように、膜厚4000〜56oo
λのアルファタンタル薄膜2をセラミック基板1に被着
させる。次に、同図(b)に示すように、タンタル薄膜
2の全面にフォトレジスト3を数μmの厚さに塗布し、
公知の一7オトエ、チング技術によりパターン形成した
後、同図(C)に示すように、所定領域以外のタンタル
薄膜2を7.酸、硝酸、水の混合液によシエ、チングす
る。エツチング稜、フォトレジスト3を除去した後、同
図(d)に示すように、フォトレジスト4を塗布し、タ
ンタル薄膜2の所定領域が陽極酸化できるようにフォト
レジスト4をパターン形成する。更に、タンタル薄膜の
一部を0.01%のクエン酸水溶液中で0.5 mA
/ct/lの定電流化成後、120v10分間の定電圧
化成を行い、同図(e)に示すように誘電体層5に変換
し、フォトレジスト4を剥離除去する。次に、直流2極
スパ、り装置を5×10 Torr以上の真空度に排
気した後、外部よシアルボンガスを導入し、数十mTo
rrのアルゴンガス雰囲気を作り、さらに皇素ガスを導
入する。FIGS. 1(a) to 1(k) are cross-sectional views showing the manufacturing process of an embodiment of the present invention. First, we installed a DC 2-pole sputtering device with 5
After evacuation to a degree of vacuum of X10 Torr or more, argon gas is introduced from the outside to create an argon gas atmosphere of several tens of mTorr, and nitrogen and hydrogen gas are further introduced. Then, the tantalum cathode plate and the thoroughly cleaned ceramic substrate are
By maintaining a distance of 10 degrees and causing an abnormal glow discharge between both electrodes, a film thickness of 4000 to 56 mm was obtained, as shown in Figure 1 (,).
An alpha-tantalum thin film 2 of λ is deposited on a ceramic substrate 1. Next, as shown in the same figure (b), a photoresist 3 is applied to the entire surface of the tantalum thin film 2 to a thickness of several μm.
After forming a pattern using a known etching technique, as shown in FIG. Stir in a mixture of acid, nitric acid, and water. After the etching edges and the photoresist 3 are removed, a photoresist 4 is applied and patterned so that a predetermined region of the tantalum thin film 2 can be anodized, as shown in FIG. 3(d). Furthermore, a part of the tantalum thin film was heated at 0.5 mA in a 0.01% citric acid aqueous solution.
After constant current formation at /ct/l, constant voltage formation at 120V for 10 minutes is performed to convert the dielectric layer 5 into a dielectric layer 5 as shown in FIG. Next, after evacuating the DC two-pole spacing device to a vacuum level of 5 x 10 Torr or more, sialbone gas was introduced externally and
Create an argon gas atmosphere of rr, and then introduce Koji gas.
そしてタンタル陰柾板とセラミック基板1とを3〜10
0にの距離に保ち、両電極間で異常グロー放電させて、
同図(f)に示すように、基板1を含みンンタル薄Jl
!2及び誘電体層5全体に膜厚700〜900Aのタン
タル薄膜6を被着させる。次に、同図(g)に示すよう
に、タンタル薄膜6の全面に7、オドレジスト7を数μ
mの厚さに塗布し、公知のフォトエツチング技術によシ
バターン形成した後同図(h)に示すように、所定領域
以外のタンタル薄膜6を7.酸、硝酸、水の混合液によ
りエツチングし、エツチング稜、フォトしシスト7を除
去した後、同図(i)に示すようにフォトレジスト8を
塗布し、タンタル薄膜の所定領域が陽極酸化できるよう
にフォトレジストをパターン形成する。更にタンタル薄
j[2の一部を0.01チクエン酸水溶・液中で0.5
mA/cjの定電流化成後、160V2時間の定電圧化
成を行い同図0)K示すように、誘電体層5′に変換し
、フォトンジス2ト8を剥離除去する。次に、同図(k
)に示すように上記構体の全面に膜厚それぞれ1000
λ、100OA 、6000Aのニクロム、バラジュー
ム、金の3層構造からなる導体薄膜9をスバ、りし、続
いてフォトエツチングにより電極をパターン形成する。Then, 3 to 10 tantalum shade plates and ceramic substrates 1 are
By keeping the distance at 0 and causing an abnormal glow discharge between both electrodes,
As shown in FIG.
! A tantalum thin film 6 having a thickness of 700 to 900 Å is deposited on the entire surface of the tantalum film 2 and the dielectric layer 5. Next, as shown in FIG.
After coating the tantalum thin film 6 to a thickness of 7.m and forming a pattern using a known photoetching technique, the tantalum thin film 6 other than the predetermined area is etched as shown in FIG. 7(h). After etching with a mixture of acid, nitric acid, and water to remove the etched edges and photoresist cysts 7, a photoresist 8 is applied as shown in FIG. pattern the photoresist. Furthermore, a part of tantalum thin J[2 was added to 0.5
After constant current formation at mA/cj, constant voltage formation at 160V for 2 hours is performed to convert it into a dielectric layer 5', as shown in Figure 0)K, and the photon resist 2 is peeled off. Next, in the same figure (k
), a film thickness of 1000 mm was applied to the entire surface of the above structure.
A conductor thin film 9 having a three-layer structure of nichrome, baladium, and gold with a thickness of λ, 100 OA, and 6000 amps is removed, and then electrodes are patterned by photoetching.
第1表は基板素面及びグレーズ上に各々同一ノ(ターン
で形成したタンタル薄膜コンデンサの歩留りを示す。第
1表が示すように、グレーズのないセラミ、り基板素面
にでも、グレーズ上に形成したものと同郷以上の遜色の
ない高歩留りのタンク4Mコンデンサが得られる。Table 1 shows the yield of tantalum thin film capacitors formed on a bare substrate surface and on a glaze. You can obtain a tank 4M capacitor with a high yield comparable to that of its compatriots.
4、図面の簡単な説明
(6)第1図(a)ないしくk)は本発明の一実施
例における製造工程を説明するための断面図である。
(C)l・・・・・・セラミ、り基板、2
,6・・・・・・タンタル薄膜、3,4,7,8・・・
・・・7オトレジスト、5 、5’ (1)・
・・・・・陽衡酸化誘電体層、9・・・・・・導体薄膜
。4. Brief explanation of the drawing
(6) FIGS. 1(a) to 1(k) are cross-sectional views for explaining the manufacturing process in one embodiment of the present invention.
(C) l...ceramic substrate, 2
, 6... Tantalum thin film, 3, 4, 7, 8...
...7 Otoregist, 5, 5' (1)・
... Equilibrium oxide dielectric layer, 9 ... Conductor thin film.
代理人 弁理士 内 原 晋 (e
)(()
第1図
235−Agent Patent Attorney Susumu Uchihara (e
)(() Fig. 1 235-
Claims (1)
形成する工程を含むことを特徴とする混成集積回路の製
造方法。A method for manufacturing a hybrid integrated circuit, comprising the step of forming an alpha-tantalum capacitor on a bare surface of a ceramic substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56118032A JPS5818954A (en) | 1981-07-28 | 1981-07-28 | Manufacture of hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56118032A JPS5818954A (en) | 1981-07-28 | 1981-07-28 | Manufacture of hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5818954A true JPS5818954A (en) | 1983-02-03 |
Family
ID=14726361
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56118032A Pending JPS5818954A (en) | 1981-07-28 | 1981-07-28 | Manufacture of hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5818954A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5796073A (en) * | 1980-12-04 | 1982-06-15 | Kanebo N S C Kk | Adhesive composition |
| US7446264B2 (en) | 2004-12-15 | 2008-11-04 | Nok Corporation | Electromagnetic wave shielding gasket |
-
1981
- 1981-07-28 JP JP56118032A patent/JPS5818954A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5796073A (en) * | 1980-12-04 | 1982-06-15 | Kanebo N S C Kk | Adhesive composition |
| US7446264B2 (en) | 2004-12-15 | 2008-11-04 | Nok Corporation | Electromagnetic wave shielding gasket |
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