JPS5819006A - intermediate frequency amplifier circuit - Google Patents

intermediate frequency amplifier circuit

Info

Publication number
JPS5819006A
JPS5819006A JP56118085A JP11808581A JPS5819006A JP S5819006 A JPS5819006 A JP S5819006A JP 56118085 A JP56118085 A JP 56118085A JP 11808581 A JP11808581 A JP 11808581A JP S5819006 A JPS5819006 A JP S5819006A
Authority
JP
Japan
Prior art keywords
intermediate frequency
terminal
circuit
frequency amplifier
constant current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56118085A
Other languages
Japanese (ja)
Inventor
Takashi Amano
天野 孝
Masaharu Sato
政晴 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56118085A priority Critical patent/JPS5819006A/en
Publication of JPS5819006A publication Critical patent/JPS5819006A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To improve the elimination characteristics of interference waves by connecting a intermediate frequency circuit to a connecting point between a detecting circuit connected to an interfrequency amplifying circuit in multistage cascade connection and a load resistor. CONSTITUTION:An intermediate frequency amplifying circuit is of a differential amplifier constitution of three-stage direct coupling consisting of transistors (TR) Q1-Q6, load resistors R2-R7, and constant current sources A1-A3. A constant current power supply source A4 is connected to a TRQ7, and an LPF consisting of capacitors C5 and C6 is connected to a terminal P6, and a detected output is picked up from a terminal 6. A parallel resonance circuit consisting of a coil L and a capacitor C4 and a coil L is connected to a terminal P4. An interference wave invaded to an output terminal P1 of a filter 2 and its succeeding stage is eliminated at this parallel resonance circuit and not outputted to the terminal 5.

Description

【発明の詳細な説明】 本発明は、妨害波除去特性を高める機能の伺加が可能な
中間周波増幅回路に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an intermediate frequency amplification circuit capable of adding a function to improve interference wave removal characteristics.

従来、一般的な中間周波増幅回路と検波回路の構成を第
1図に示した。入力端子1に印加された中間周波信号は
中間周波通過フィルター2を通じて、多段に縦続接続さ
れた中間周波増幅器3に入る。この中間周波増幅部で増
幅を受けた中間周波信号は検波回路部4に入って検波さ
れ、出力端子6より取り出される0この従来の回路では
、中間周波以外の妨害波の除去は、入力端子1に接続さ
れたフィルター2で行うだけであった。このため放送電
波の強電界下では、」二記フィルターの出力端子以降に
直接飛び込んだ中間周波以外の電波は検波部4で検波さ
れ、妨害波出力となる場合があった0 本発明は特定の端子への共振回路の接続によりこの妨害
波除去特性を高める機能を伺加することができる中間周
波増幅回路を提供するものである。
FIG. 1 shows the configuration of a conventional, common intermediate frequency amplification circuit and detection circuit. An intermediate frequency signal applied to an input terminal 1 passes through an intermediate frequency pass filter 2 and enters an intermediate frequency amplifier 3 connected in cascade in multiple stages. The intermediate frequency signal amplified by the intermediate frequency amplification section enters the detection circuit section 4, is detected, and is taken out from the output terminal 6. In this conventional circuit, interference waves other than the intermediate frequency are removed by input terminal 1. It was only necessary to use filter 2 connected to the . For this reason, under the strong electric field of broadcast radio waves, radio waves other than intermediate frequencies that directly enter the output terminal of the filter mentioned above may be detected by the detection section 4 and become an interference wave output. The object of the present invention is to provide an intermediate frequency amplification circuit that can add a function to enhance this interference wave removal characteristic by connecting a resonant circuit to a terminal.

て説明する。I will explain.

第2図は、中間周波増幅回路部を3段直結の差動増幅器
で構成するとともに、検波回路をエミッタフォロアとロ
ーパスフィルタで構成した本発明の中間周波増幅回路の
具体的な構成を示す図であり、中間周波増幅回路部は、
トランジスタQ、〜Q9負荷抵抗R2〜R7、定電流電
源人1〜’sk構成要素とする3段直結形の差動増幅器
構成となっている。この最終段の片側の負荷抵抗R7と
 トランジスタQ6のコレクタとの接続点は、エミッタ
フォロアトランジスタQ7のベースに接続されている。
FIG. 2 is a diagram showing a specific configuration of the intermediate frequency amplifier circuit of the present invention, in which the intermediate frequency amplifier circuit section is composed of a three-stage directly connected differential amplifier, and the detection circuit is composed of an emitter follower and a low-pass filter. Yes, the intermediate frequency amplification circuit section is
It has a three-stage directly connected differential amplifier configuration including transistors Q and Q9, load resistors R2 to R7, and constant current power supplies 1 to 'sk. The connection point between the load resistor R7 on one side of the final stage and the collector of the transistor Q6 is connected to the base of the emitter follower transistor Q7.

エミッタフォロアトランジスタQ7の エミッタには定
電流電源A4が接続されるとともに、さらに端子P6を
介してコンデンサa5.Cい抵抗R1oで構成されるロ
ーパスフィルタが接続され、コンデンサC6と抵抗R1
0との接続点には検波出力信号を取りだすための端子5
が付設されている。抵抗R1゜R8およびR7d直流帰
還用抵抗、また、コンデンサC,、C2は交流のバイパ
ス用コンデンサーであるO ところで、第2図の中間周波増幅回路では、中間周波増
幅器最終段の片側の負荷抵抗R7,トランジスタQ6の
コレクタ及びトランジスタQ7のペースとの結合点を端
子P4に接続している。この端子P4には直流阻止用コ
ンデンサC6を介してコイルLとコンデンサC4より成
る並列共振回路が接続され、さらに、この並列共振回路
の他方は交流的接地として電源用端子P5に接続されて
いる。
A constant current power supply A4 is connected to the emitter of the emitter follower transistor Q7, and a capacitor a5. A low-pass filter consisting of a resistor R1o is connected, and a capacitor C6 and a resistor R1
At the connection point with 0, there is a terminal 5 for taking out the detection output signal.
is attached. Resistors R1゜R8 and R7d are DC feedback resistors, and capacitors C, C2 are AC bypass capacitors.In the intermediate frequency amplifier circuit shown in Fig. 2, the load resistor R7 on one side of the final stage of the intermediate frequency amplifier is , the connection point between the collector of transistor Q6 and the pace of transistor Q7 is connected to terminal P4. A parallel resonant circuit consisting of a coil L and a capacitor C4 is connected to this terminal P4 via a DC blocking capacitor C6, and the other end of this parallel resonant circuit is connected to a power supply terminal P5 as an AC ground.

なお、並列共振回路は、中間周波信号に対しては抵抗R
7に比して充分高いインピーダンスとなり、それ以外の
妨害波に対してはほとんど短絡状態に近い低インピーダ
ンスとなる様に設定できる。したがって、フィルタ2の
出力端子P1以後に妨害波が直接飛び込んだとしても、
妨害波はこの並列共振回路において除去されるところと
なり、妨害波が検波回路で検波されて端子5に妨害波出
力として現われる不都合は確実に排除される。
Note that the parallel resonant circuit has a resistance R for intermediate frequency signals.
It can be set so that it has a sufficiently high impedance compared to 7, and has a low impedance almost like a short circuit for other interference waves. Therefore, even if interference waves directly enter after output terminal P1 of filter 2,
The interference wave is removed in this parallel resonant circuit, and the inconvenience that the interference wave is detected by the detection circuit and appears as an interference wave output at the terminal 5 is reliably eliminated.

また、本発明の中間周波増幅回路では、端子P4に何も
接続せず、この端子P4を開放状態としてもよい。この
場合の直流動作状態は並列共振回路接続時と同じである
。また中間周波信号に対しても前記の並列共振回路のイ
ンピーダンスは抵抗もよりも充分大きいため、この並列
共振回路が無くても妨害波除去特性以外の特性はほとん
ど変りがない様にできる。すなわち、第2図の中間周波
増幅回路では妨害波除去特性の改善が特に必要がない場
合には、端子P4を開放状態にして用いればよい。
Furthermore, in the intermediate frequency amplification circuit of the present invention, nothing may be connected to the terminal P4, and the terminal P4 may be left in an open state. The DC operating state in this case is the same as when connected to a parallel resonant circuit. Furthermore, since the impedance of the parallel resonant circuit is sufficiently larger than the resistance for intermediate frequency signals, the characteristics other than the interference wave removal characteristics can be made almost unchanged even without this parallel resonant circuit. That is, in the intermediate frequency amplifier circuit of FIG. 2, if there is no particular need to improve the interference wave removal characteristics, it is sufficient to use the intermediate frequency amplifier circuit with the terminal P4 in an open state.

以上説明したところから明らかなように、本発明の中間
周波増幅回路は、負荷抵抗と検波回路との接続点に共振
回路を接続するか否かの選択によって、妨害波除去特性
を付与するか否かの選択が可能であり、目的に応じて回
路特性を容易に変更することができ、その応用範囲を拡
大することができる。
As is clear from the above explanation, the intermediate frequency amplifier circuit of the present invention can impart interference wave rejection characteristics or not by selecting whether or not to connect a resonant circuit to the connection point between the load resistor and the detection circuit. The circuit characteristics can be easily changed depending on the purpose, and the range of application can be expanded.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の中間周波増幅器の構成を示すブロック図
、第2図は本発明の一実施例にかかる中間周波増幅器の
具体的な回路構成を示す図である。 1・・・・・・中間周波入力端子、2・・・・・・中間
周波通過フィルター、3・・・・・中間周波増幅器、4
・・・・・・検波回路部、5・・・・・・出力端子、Q
1〜Q7・・・・・・トランジスタ、R7・・・・・・
抵抗、C5〜C6・・・・・・コンデンサ、R4・・・
・・端子。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
FIG. 1 is a block diagram showing the configuration of a conventional intermediate frequency amplifier, and FIG. 2 is a diagram showing a specific circuit configuration of an intermediate frequency amplifier according to an embodiment of the present invention. 1...Intermediate frequency input terminal, 2...Intermediate frequency pass filter, 3...Intermediate frequency amplifier, 4
...Detection circuit section, 5...Output terminal, Q
1~Q7...Transistor, R7...
Resistor, C5-C6... Capacitor, R4...
...Terminal. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
figure

Claims (1)

【特許請求の範囲】[Claims] 多段に縦続接続された中間周波増幅器で構成される中間
周波増幅回路部と、同回路部の出力負荷抵抗に接続され
た検波回路部を有するとともに、前記負荷抵抗と検波回
路との接続点に中間周波共振回路接続用の外部端子を設
けたことを特徴とする中間周波増幅回路。
It has an intermediate frequency amplification circuit section composed of intermediate frequency amplifiers connected in cascade in multiple stages, a detection circuit section connected to the output load resistance of the circuit section, and an intermediate frequency amplifier circuit section at the connection point between the load resistance and the detection circuit. An intermediate frequency amplification circuit characterized by having an external terminal for connecting a frequency resonant circuit.
JP56118085A 1981-07-27 1981-07-27 intermediate frequency amplifier circuit Pending JPS5819006A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56118085A JPS5819006A (en) 1981-07-27 1981-07-27 intermediate frequency amplifier circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56118085A JPS5819006A (en) 1981-07-27 1981-07-27 intermediate frequency amplifier circuit

Publications (1)

Publication Number Publication Date
JPS5819006A true JPS5819006A (en) 1983-02-03

Family

ID=14727619

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56118085A Pending JPS5819006A (en) 1981-07-27 1981-07-27 intermediate frequency amplifier circuit

Country Status (1)

Country Link
JP (1) JPS5819006A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6014460U (en) * 1983-07-07 1985-01-31 旭化成株式会社 solar panel
JPS61230410A (en) * 1985-04-03 1986-10-14 Sony Corp Am detection circuit
JPS63212224A (en) * 1987-02-28 1988-09-05 Sony Corp Microwave circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6014460U (en) * 1983-07-07 1985-01-31 旭化成株式会社 solar panel
JPS61230410A (en) * 1985-04-03 1986-10-14 Sony Corp Am detection circuit
JPS63212224A (en) * 1987-02-28 1988-09-05 Sony Corp Microwave circuit

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