JPS58194576U - detection circuit - Google Patents
detection circuitInfo
- Publication number
- JPS58194576U JPS58194576U JP9108182U JP9108182U JPS58194576U JP S58194576 U JPS58194576 U JP S58194576U JP 9108182 U JP9108182 U JP 9108182U JP 9108182 U JP9108182 U JP 9108182U JP S58194576 U JPS58194576 U JP S58194576U
- Authority
- JP
- Japan
- Prior art keywords
- synchronization signal
- detection circuit
- vertical synchronization
- product
- pseudo
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Television Signal Processing For Recording (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案による検出回路が使用されたテレビジョ
ン受像機の例を示す構成図、第２図は本 −考案によ
る検出回路の一実施例を示す接続図、第３図及び第４図
は夫々第２図例の説明に供する線図である。
−１４ａ及び１４ｂは夫々同期信号
５ｓｙｎｃ及び垂直ブランキングパルスＰｖＢが供給さ
れる端子、１４Ｃは出力端子、１５は積分回路、１７は
アンド回路、２１は遅延回路である。FIG. 1 is a configuration diagram showing an example of a television receiver using the detection circuit according to the present invention, FIG. 2 is a connection diagram showing an embodiment of the detection circuit according to the present invention, and FIGS. 3 and 4. are diagrams for explaining the example in FIG. 2, respectively.
-14a and 14b are terminals to which the synchronization signal 5sync and vertical blanking pulse PvB are supplied, respectively; 14C is an output terminal; 15 is an integrating circuit; 17 is an AND circuit; and 21 is a delay circuit.
Claims (1)
期信号の直前に擬似垂直同期信号が挿入された同期信号
との積をとり、この積出力で上記擬似垂直同期信号の有
無を検出するようにした検出回路。The product of the pulse obtained by delaying the vertical output pulse by a predetermined time and the synchronization signal in which a pseudo vertical synchronization signal is inserted immediately before the vertical synchronization signal is taken, and the presence or absence of the pseudo vertical synchronization signal is detected from this product output. detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9108182U JPS58194576U (en) | 1982-06-18 | 1982-06-18 | detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9108182U JPS58194576U (en) | 1982-06-18 | 1982-06-18 | detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58194576U true JPS58194576U (en) | 1983-12-24 |
Family
ID=30099500
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9108182U Pending JPS58194576U (en) | 1982-06-18 | 1982-06-18 | detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58194576U (en) |
-
1982
- 1982-06-18 JP JP9108182U patent/JPS58194576U/en active Pending
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