JPS58196681A - Address converting system for virtual machine system - Google Patents

Abstract

PURPOSE:To convert an address at high speed, by setting a part of an identifier of a virtual machine and a part of an address, etc. as a key part of an address converting buffer and giving the virtual machine identifiers of the parts other than the key part and a real address identifier, etc. to an address register to detect the coincidence of contents between the key part and the address register. CONSTITUTION:In a real channel controller, the addresses, etc. on a virtual machine identifier and a virtual machine are applied to an address register 1. A part of the address on the virtual machine is given to a converting buffer 2. The contents of the buffer 2 are read out, and a part of the address on the virtual machine is delivered to a signal line 104. A comparing part 3 compares the data of a key part given from a signal line 100 with a part of the data given from the buffer 2. If the coincidence is obtained from this comparison, the state is set at ''1'' for the signal on a signal line 108. A selecting part 4 selects the data on the contents of the buffer 2 given from a signal line 105, and this data part functions as a part of a real address on the signal line 107. Thus an address can be converted at high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION (Description of the Technical Field) The present invention relates to an address translation method in a virtual machine system, and particularly to the configuration of such an address translation method.

(Description of Prior Art) Conventionally, in a virtual machine system, an address translation table is stored in the main memory 1CWlk.

Since the address on the virtual machine was translated into a real address, there was a drawback that the address translation speed was slow.

(Detailed Description of the Invention) An object of the present invention is to use a part of a virtual machine identifier and a part of an address on a virtual machine as a key part of an address translation buffer, and use part or all of a real address as data in the address translation buffer. The content of the address translation buffer is stored as a part of the virtual machine identifier, the virtual address/real address identifier on the virtual machine, and the part other than the key part of the address on the virtual machine as the address of the address translation buffer. A certain h executes writing, and if the key part of the data extracted from the address translation buffer matches the corresponding part of the 7 address information, the data part is set as part or all of the real address. , if they do not match, the address information obtained by the address translation unit from the address translation table is used as part or all of the real address as 1N2! It is an object of the present invention to provide a method for eliminating the above drawbacks and speeding up address translation in a virtual machine system.

(Description of structure and operation of @Ming) The address translation method according to the present invention is included in a real channel control device used in a virtual machine system. The address translation method in the virtual machine system according to the present invention is address translation buff 7a, avvxR*f! mh, a1. 7゜17. □This is a system that includes a buffer control section, an address register, a comparison section, and a selection section.

The address translation buffer uses part of the virtual machine identifier and part of the address on the virtual machine as key parts, and stores an address translation table. The data portion of the address conversion table consists of part or all of the real address. Therefore, the address conversion unit converts a virtual address or a real address on a virtual machine into a part or all of a real address on a real machine using an address conversion table.

The address translation buffer control section stores part or all of the real address obtained by the address translation section into the data section of the address translation buffer, and stores a part of the virtual machine identifier and a part of the address on the virtual machine in the address translation buffer. This is to be written in the key section. The address register uses the virtual machine identifier other than the key part, the virtual address/real address identifier on the virtual machine, and a part of the address on the &tl machine other than the key part as address information, writes the address translation buffer, This is the ninth temporary recording device that performs line cutting. The comparison section detects whether the key part of the successive [7 data sent from the address translation buffer and the corresponding part of the address information set in the address register] match. When a match is detected by the comparison section, the selection section selects the read data from the address conversion buffer as part or all of the real address section of the real machine; when no match is detected, the selection section selects the read data from the address translation buffer as part or all of the real address section of the real machine. Select the obtained address information as part or all of the real address of the real machine.

(Explanation of examples of actual power) Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram of a device 91' for realizing an address translation method in a virtual machine system according to the present invention. In FIG. 1, the device that implements the address translation method is composed of an address register l, an address translation buffer 2, a comparison section 3, a selection section 4, an address translation section 5, and an address translation buffer control section 6. . In a real channel control device used in a virtual machine system, a virtual machine identifier, a virtual address/real address identifier of a virtual machine E, and a real address on the virtual machine are given to an address register I as address information.

Therefore, the virtual machine identifier other than the key part, the virtual address/real address identifier on the virtual machine, and part of the address on the virtual machine other than the key part are stored in the address register l.
is applied as an address to the address translation buffer 2 via the signal line 101. According to this address, the contents of the address translation buffer 2 are successively output. Among the data successively output from the address translation buffer 2.

A portion of the virtual machine identifier and a portion of the address on the virtual machine are output on signal line 104K. The comparator 3 compares the data of the key portion sent from the address register 1 via the signal line 100 with a portion of the data sequentially output from the address conversion buffer 2 via the signal line 1()4.

When the comparison unit 3 finds that both data match, the state of the signal @018 becomes 1. Therefore, in the selection section 4, the signal line 105
The data portion of the contents of the address translation buffer 2 that is successively displayed is selected. In the signal line 107, this data portion becomes part of the real address.

The real address is the data sent out on signal line 107K.

signal, and the data sent to 1ilioz.

The data sent on signal $102 is the portion of the nine data given to address register l that does not require conversion. Using the real address obtained as above, the cache memory and the tf main memory are accessed and addressed. If the comparison unit 3 does not find a match between the two data, the data to be converted is input to the address conversion unit 5 via the signal line 103, the address converted output is selected by the selector 4, and the signal Output to line 107. At this time, the address conversion buffer control unit 6 converts the 11 addresses of the address register l, but
The signal to be held until the address converted value is output is sent to the address conversion buffer control unit 6 via the signal line 109.
instructions from. After the address converted value is output, an instruction to write the key section and data section is sent from the address conversion buffer control section 6 to the address conversion buffer 2 via the signal line 110.

(Detailed Description of the Invention) As explained above, in the present invention, a part of a virtual machine identifier and a part of an address on a virtual machine are set as key parts of an address translation buffer of a real channel control device, and an address As the address information of the translation buffer, the virtual 727 identifier other than the key part, the virtual address/real address identifier on the virtual machine, and part of the address information other than the key part of the address on the virtual machine are given to the address register. When the key part of the conversion buffer matches the contents of the corresponding part of the address register, part or all of the real addresses that successively appear as the data part can be used as part or all of the real address of the memory to be accessed. This has the effect of speeding up address translation in the virtual machine system [3].

[Brief explanation of drawings]

FIG. 1 shows an example of the address translation method in the virtual machine system configured according to the present invention. FIG. 2 is a block diagram showing a. l...Address register 2...Address translation buffer 3...Comparison section 4'-Selection section 5...Address translation section 6...Address translation buffer control section 100-110...Signal line patent application Person NEC Co., Ltd. Agent Patent Attorney Hisashi I) Ro

Claims (1)

[Claims] In the address translation method included in real channel control installation and used in virtual machine systems, part of the virtual machine identifier and part of the address on the virtual machine are used as key parts, and part or all of the real address is used as the data part. an address translation buffer used as an address translation buffer, an address translation unit for converting the virtual address information on the virtual machine from a real address into a part or all of the real address on the real machine using an address translation table, and the address translation unit. Part of the real address obtained by
Address translation buffer control for writing all the data into the data part of the address translation buffer, and writing part of the virtual machine identifier and part of the address on the virtual machine into the key part of the address translation buffer. Department and
A virtual machine identifier other than the key part, a virtual address/real address identifier on the virtual machine, and a part of the address on the virtual machine other than the key part described in ^1J are used as address information to convert the address translation buffer into the address translation buffer. an address register for writing and writing,
a comparison unit for detecting whether a key part of the successive data sent from the address translation buffer matches a corresponding part of the address information set in the address register; When a writing match is detected, select successive data from the address translation buffer as part, t, or all of the real address of the writing machine;1. The apparatus is characterized by comprising a selecting section and 'kjL for selecting the address information obtained by the address information section as part or all of the real address X of the real machine when the matching is not careful. address translation method in a virtual machine system.