JPS58201366A - Manufacture of mos type semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the punch-through of B as well as to stably obtain a P type Si gate MOSFET by a method wherein an oxygen unpermeative film is provided on a poly Si film alone and a B-ion is implanted thereon. CONSTITUTION:A poly Si film 9 and an Si3N4 or an Al2O3 film 10 are superposed on a gate oxide film 8, a selective etching is performed, the oxygen unpermeative film 10 is left on a poly Si gate electrode 9, and when a B-ion implantation is performed on a poly Si layer 9, an N type Si substrate 6 is provided at the same time. According to this constitution, the punch-through of B is hardly generated even when a heat treatment is performed in O2 or vapor. There is a possibility of dissolving of B into an SiO2 film with O2 infiltrated from the side face of the layer 9, but the distance thereof is sufficiently short when compared with the gate length, and no influence is infricted on the FET characteristics at the center part of the gate, thereby enabling to manufacture the desired P type Si gate MOSFET is stabilized.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a mob semiconductor device, and in particular to a method for manufacturing a mob semiconductor device including a MtJm transistor using gate ionization made of PALL polysilicon doped with boron.

In the conventional MUalC, it is a self-rubbing method that closes the gate valley.
O polycrystalline silicon gate #1ffi is widely used. N-channel MCI)
In the P-channel M(l) transistor, i is directly diffused into the boron gate silicon to prevent the formation of a depletion layer and to lower the resistance. However, when the polycrystalline silicon of the gate gun is doped with boron, this boron penetrates through the gate oxidation layer due to the thermal grip of the mirror, and a phenomenon occurs in which the boron is degraded to the quasi-crystalline silicon H11 of the F base. Therefore, a PIJI silicon gate in which boron is diffused into the polycrystalline silicon of a KP channel MCI) has a punch compared to a P channel M (JS) transistor using a thin silicon gate. Despite its advantages such as the ease of suppressing through-through, it has not been put into practical use due to limitations in temperature, temperature, and air pressure during its production.

The t41 diagram is a P-channel silicon group (MO) made by the conventional method.
S) During the transistor manufacturing process, that is, gate IE
This is a schematic cross-sectional view of the foreshadowing in which the pole, source, and drain diffusion layers are formed and the entire surface is covered with KFG, where l is an N silicon substrate;
2 is a P diffusion layer, 3 is an oxide layer, and 4 is a polycrystalline silicon layer. In the conventional method, the oxygen in the thermal process atmosphere is false or zero.
The boron t in the polycrystalline silicon 4 diffuses through the collapse limit 3 and the polycrystalline silicon wire 4 in the form of
- In oxidation 1i1113 [6 was solved. For this reason, in the conventional method, heat treatment was performed in an atmosphere without oxygen or in Ar. However, in ML) 81C, it is often necessary to form thermal oxidation #& on the & surface in parts other than the transistor, and for this purpose, in Yonekata, P channel silicon gate MtjJ9) Runjisume ;6 is @ There was a le.

The present invention eliminates the drawbacks of such rice health methods.

The object of the present invention is to provide a manufacturing method for a semiconductor device I#L including a pH silicon gamer 08 transistor, which can be stably formed without causing a boron penetration phenomenon.

This mWK twist #-j, one machine that forms polycrystalline, &&silicon- on silicon oxide -θ formed on the silicon crystal surface, and one machine that forms polycrystalline silicon on #silicon oxide line.
Selective etching is performed to form the M08 transistor's grooves and interconnects, and then an ion implantation bed is used to doze the gate and interconnects, and at the same time form source and drain diffusions. , 1 root, which has been around for a long time.
Like a false experiment, a weight that formed a slant that allowed the #1 bulk to pass through, and by performing the selective etching after a long time, left a mark that did not allow the oxygen to pass through only on the polycrystalline silicon;
Ion implantation - Features of hALJ
A method for manufacturing a semiconductor device is obtained.

The present invention is based on the IQ field of ≦〈Boron O gate oxidation described on page 0, the invasion into silicon is due to the accelerated diffusion of boron in polycrystalline silicon, and the invasion during the saponification experiment. Responsible. However, regarding the former, it is necessary to diffuse boron throughout the entire polycrystalline silicon film, especially near the gate projection surface.

Rather, it is a preferable percentage, and suppressing it will cause inconvenience on the contrary. Therefore, it is necessary to suppress only the oxidation and intrusion of boron into the material.

Boron is oxidized as an impurity atom [If it diffuses, the penetration distance is shallow, and the penetration to the substrate is a normal thermal process.In other words, if it is a device equivalent to a H-channel Mθδ transistor, boron will penetrate to the substrate. This is because boron reacts with oxygen that has entered into polycrystalline silicon during heat treatment and dissolves in the gate 841 in the form of boron glass pigeon 01, and because the melting point of this boron glass is low, it becomes a #cfjIL body. Gate oxidation - during 't-migration, the boroy group Ii
This is because it easily reaches K. Oxidation of boron
In order to suppress the O bath, it is necessary to allow oxygen to reach the interface between the polycrystalline silicon and the gate oxide.

Figure 2 shows the r-channel P power silicon group according to the present invention.
In the process of manufacturing a semiconductor device including a U# transistor, in other words, when polycrystalline silicon is used on silicon oxide and the film that does not allow the lithium to pass through, for example, "iJ%mmelb" is Al-rich.
After forming a maple like this, and then performing selective etching to form a dart electric field made of polycrystalline silicon, Lf is formed on the polycrystalline silicon.
This is an MB&+ model in which all the source and drain enlarged layers are formed by ion implantation of boron while leaving h-, 6 is a solid silicon substrate, 7tiPjl is an enlarged layer, and 8 is a goo [C1111.9 is 10 is made of polycrystalline silicon into which boron has been introduced by ion implantation, and is made of a film that does not allow oxygen to pass through. P
To expand, m 7 if; 1 many IMi & silicon rice 9 to 0
It is formed at the same time as the boron ion implantation. In this way, if #, * is left on polycrystalline silicon 9, it is possible to heat the polycrystalline silicon using oxygen or water vapor! For 1119, it is equivalent to heat treatment in an inert gas, and it is very unlikely that a congratulatory message will be sent through the water.The theory behind this is that SA8N
4, A40. Draft 1: When thermally oxidized in air, oxygen enters from the polycrystalline silicon sac and causes oxidation of boron. However, the distance is as short as the gate length KIIilbe, so it does not affect the customization of the transistor in the center of the gate.

As described above, according to the present invention, a Chihiro body including a P-channel Pg silicon gate M08 transistor can be stably manufactured without causing a boron penetration situation without significantly changing the conventional process. This becomes l1jT ability.

[Brief explanation of the drawing]

Figure 1 shows P-channel silicon (MO!) using the conventional method.
In the middle of the manufacturing process of the i-transistor, l is the N-type substrate, 2 is the P field expansion increase, 3 is the oxidation L, 4 is the polycrystalline silicon, 5 is the gate oxidation and the gate polycrystalline silicon. It is world. Figure 2 shows a P-channel silicon gate M (7) according to the present invention.
1) In the middle of manufacturing Ranjisume, 11rIjill & formula is shown, 6 is a silicon substrate, 7 is a P-type diffusion layer, 8 is gate oxidation 11.9 Boron is introduced by ion implantation into polycrystalline silicon, 10 is oxygen - is not allowed to pass through.

Claims (1)

[Claims] A step of forming a polycrystalline silicon film on the silicon reformed limit formed on the silicon crystal table 1*, and a step of forming the silicon layer.
Selective etching of the polycrystalline silicon formed above
O8 transistor gate l! The steps of forming the electrodes and interconnections, then fully doping the solder electrodes and interconnects with holons by ion implantation, forming source and drain diffusion layers at the same time, and then subjecting them to thermal acidification. Miyamu M (J:3
@ In the manufacturing method of the meridian device, -1 polyacrylic silicon s1 is formed by δ1mNa1l! ! Or Yuu,
By fully forming the m that does not allow oxygen to pass through, such as the eye, and then performing selective etching, only the VC on the polycrystalline silicon surface was left with the m that does not permeate the wood. Performing the injection r% imitation IVI
LJ type 8 beef fat eel k (2) manufacturing method.