JPS582065A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To contrive to enhance density of a semiconductor device by a method wherein an Si compound of a high melting point metal containing reversely conductive impurities to a base is used as electrodes for the collector contact region and the emitter region, and the emitter region is formed by self alignment the same. CONSTITUTION:After openings are formed on the base region 12 and the collector contact region 11, the Si compound (an MoSi2 film, for example) 15 of the high melting point metal containing the reversely conductive impurities to the base is adhered on the surface. Then patterning of the Si compound 15 thereof is performed to make the Si compound 15 to remain only on the emitter region and on the collector contact region 11. Here treatment is performed, containing impurities are made to diffuse from the Si compound 15 to form the emitter region 16, and the surface of the Si compound 15 is oxidized. Then a conductive metal is adhered, and patterning is performed to form the base electrode 18. As a result, the emitter can be formed by self alignment, and performance of high speed operation and formation in high integration of the IC can be attained.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which electrode wiring has excellent conductivity and is highly densified.

The semiconductor device having the cross-sectional structure shown in FIG.
This structure has been adopted since the early days of RM manufacturing, and is not suitable for high density and difficult to increase the degree of integration.
ICs using semiconductor devices having a structure called "elf alignment" are being manufactured. In these figures, l is a semiconductor substrate, 2 is an element isolation region, 8 is a collector contact region, 4 is a base region, 6 is an emitter region, 6 is a V9 dioxide (V9) film, and 7 is an aluminum (
Al) electrode 8 indicates a doped polycrystalline silicon layer, but compared to FIG. / If the silicon layer 8 is interposed and the polycrystalline silicon layer 8 is subjected to high temperature oxidation treatment, Sing l[(second
In addition, by oxidizing only the surface, a SiO+s+ film (the part shown as 6' in Fig. 2) can be formed and isolated, so this can be used to make the emitter [ & is formed by self-fining (self-alignment) and has a high-density structure.

If electrodes are formed with polycrystalline silicon 8 in this way, it is easy to improve the degree of integration, but on the other hand, the specific resistance of the polycrystalline silicon layer is two orders of magnitude higher than that of l metal, and the AlO resistivity 8 1o-6[Ω・aIl]' The specific resistance of the polycrystalline silicon layer is 1(1-
4[Ω·anl], which limits the high-speed operation of the IC.

The present invention proposes a manufacturing method for the purpose of eliminating such drawbacks that limit the operating characteristics.
As the L pole, a silicon compound of a high melting point metal containing impurities with conductivity st and m opposite to that of the paste is used, and the emitter region is formed in the same way with 7 to 5 fines to achieve a high density structure, see the drawings below. This will be explained in detail using an example.

FIGS. 8 and 8 are cross-sectional views in the order of steps of an embodiment of a semiconductor device according to the present invention in which molybdenum silicide F (Mo81z) is used as a high-melting point metal silicon compound. First, as shown in FIG. 8, a field 5108 film 10 is formed as an element isolation region on a p-type semiconductor substrate l by a known manufacturing method.

Then, an n + -type collector contact region 11 connected to the n + -type buried layer and a p-type base region 12 are provided in the nm-contact region (Etakinya lVa length N ) ta.

The collector contact area contains phosphorus.

The paste region 12 is formed by ion-implanting boron, for example, and heat-treated at about 900[° C.] for 8° to have a depth of about 5000[λ]. Further, the 8102 film 14 formed on the surface of the second layer 18 by a vapor phase growth method or the like is opened to expose the collector contact region 11 and the base region 12.

Next, as shown in Figure 4, MO containing phosphorus is placed on the top surface.
8j-1115 is applied to a film thickness of 5000 [in the front and back of the body.

This is formed by sputtering a molybdenum (M'O) target on which a piece of silicon is placed in the reaction apparatus together with the semiconductor substrate 1 using argon ions ('Ar') containing geosphine (pHa'). Next, using photolithography technology, Mo12'l5 is patterned as shown in the fifth column, and Mo11g is formed on the emitter region' and collector region formed on the space area. The membrane 16 remains.'
The pattern Jung of Mo51g film is tetrafluoride back element (C]l'
4) It is preferable to use gas plasma etching to remove the five unnecessary parts.

Next, in an oxidizing atmosphere as shown in FIG.
001J1. When heat treated for 60 minutes, phosphorus diffuses from the MoSi film 16 to form an emitter region 16 with a depth of aoooc in the base region '12, and at the same time
8i2 film 150 film surface 50 surface 000 [5 lots of λ
1II11'7 is generated. At this time, phosphorus also diffuses into the collector contact area 11 as well.
〜Next, as shown in FIG. 7, a layer of HL*T'g of a certain thickness is deposited on the upper surface, and photolithography is used again to form an Al film of 1'8''.
After turning the paste tfif/<, the 5102 film 17 on the surface of the Mo5Ls film on the tt collector contact region 11 where the resist for the A/pattern Nyun remains is etched away by hydrofluoric acid treatment. Next, as shown in FIG. 8, an insulating film 19 (phosphosilicate glass film or coating resin with a film thickness of 1 [μm]) is formed thereon, and this is patterned again using photolithography technology. OMO81g on the collector core print area
Film 15, H-7t% (DklAl film and emitter,
A window is opened in the MoSj-g film connected to the area 16, and an Al film is deposited on it again, and patterned to form an A14
◎In the process cross-sectional view of FIG. 8, the Mo51g film electrode on the emitter region 16 is not shown, but it is clearly shown in the plan view of FIG. In the connection areas, 22 and 28 indicate the connection areas between the collector contact' area and the space area and the Ag conductive wiring, respectively, and FIG. 8 is a cross-section taken along line AA' in FIG.

In the above example, Mo51g is used, but MO8ig has a specific resistance of 10-'[Ω・a11
], which is an order of magnitude lower than polycrystalline silicon, so the constraints on high-speed operation are greatly eased. In addition, like polycrystalline silicon, it is easy to form with high precision and has excellent workability.
It is an electrode material that has the same advantages as polycrystalline silicon, such as being resistant to acidic chemicals such as hydrofluoric acid and nitric acid, and forming a 5102 film after heat treatment. MoSi 11 also contains tungsten silicide (WSig), a silicon compound with a high melting point metal.

Tantalum silica (Ta5111) and the like can be used in the same manner.

As described above, the present invention is a manufacturing method in which an emitter is formed by a self-line using an electrode material with improved conductivity, and it significantly contributes to high speed and high integration of ICs.

[Brief explanation of drawings]

1 and 2 are plane views of a conventional semiconductor device, FIGS. 8 and 8 are cross-sectional views of the semiconductor device according to the present invention in the order of manufacturing steps, and FIG. 9 is a plan view thereof. It is. In the figure, l is a semiconductor blocking plate, 2 is an element isolation region, 8°Ll is a collector contact region, 4.12 is a base region, and 6.
16 is the emitter region, 6, 6, 6° 14.17 is si,
0g film, 7, 18.20 is A4? III. 8 is a polycrystalline silicon layer, IO is a field Sm0g film,
18 is a collector region, and 15 is a N1osjp+ film. 11th Thirst 31'21 4j4 5th:4 6th, η 7 Figure 7 9,4 111] A'

Claims (1)

[Claims] In a method for manufacturing a semiconductor device in which an emitter region and electrodes thereof are formed after providing an element isolation region, a collector contact region, and a base region in a semiconductor substrate 1, a space region and a collector contact region are opened, and then a surface is formed. A process of depositing a silicon compound of a high melting point metal containing impurities of a type opposite to that of the paste, and then patterning the silicon compound of a high melting point metal so that it remains only on the emitter region and the collector contact region. The process of making
Next, heat treatment is performed to diffuse impurities contained in the silicon compound of the high melting point metal to form an emitter region, and a step of oxidizing the surface of the silicon/compound of the high melting point metal, followed by a step of depositing a conductive metal. Pattern Jung,
A method for manufacturing a semiconductor device, comprising the step of forming a base electrode.