JPS5820794A - Preparation of single crystal film - Google Patents

Preparation of single crystal film

Info

Publication number
JPS5820794A
JPS5820794A JP56116008A JP11600881A JPS5820794A JP S5820794 A JPS5820794 A JP S5820794A JP 56116008 A JP56116008 A JP 56116008A JP 11600881 A JP11600881 A JP 11600881A JP S5820794 A JPS5820794 A JP S5820794A
Authority
JP
Japan
Prior art keywords
film
single crystal
solid
substrate
crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56116008A
Other languages
Japanese (ja)
Other versions
JPS6234716B2 (en
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP56116008A priority Critical patent/JPS5820794A/en
Priority to NLAANVRAGE8202526,A priority patent/NL188550C/en
Priority to GB08218306A priority patent/GB2104723B/en
Priority to DE19823224604 priority patent/DE3224604A1/en
Publication of JPS5820794A publication Critical patent/JPS5820794A/en
Priority to US06/723,708 priority patent/US4576851A/en
Publication of JPS6234716B2 publication Critical patent/JPS6234716B2/ja
Priority to HK890/87A priority patent/HK89087A/en
Priority to US07/171,370 priority patent/USRE33096E/en
Granted legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2922—Materials being non-crystalline insulating materials, e.g. glass or polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3818—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2921—Materials being crystalline insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3238—Materials thereof being insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3451—Structure
    • H10P14/3452—Microstructure
    • H10P14/3458—Monocrystalline
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/382—Scanning of a beam
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0121—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves
    • H10W10/0123—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves using auxiliary pillars in the regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

Landscapes

  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は単結晶膜の製造法に係り、とりわ行絶縁体上の
単結晶半導体膜の製造方法のなかでも絶縁体上の８１阜
結晶膜の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a single crystal film, and more particularly to a method of manufacturing a single crystal semiconductor film on an insulator, and more particularly to a method of manufacturing an 81-square crystal film on an insulator.

絶縁体上の単結晶半導体膜の製造方法としては通常５Ｏ
Ｓ（日１１ｉｃｏｎ　　Ｏｓ　　８ａｐｐｈｉｒｅ）に
代表される。単結晶サファイヤ基板上にｓ７半導体膜を
エピタキシャル法で膨面する方法がある。The method for manufacturing a single crystal semiconductor film on an insulator is usually 5O.
It is represented by S (Japanese 11 icon Os 8apphire). There is a method of expanding an S7 semiconductor film on a single crystal sapphire substrate by an epitaxial method.

しかし、前記従来技術では、育Ｊされた単結晶半導体ｓ
ｉｇｔｉが基板サファイヤ単結晶の格子間定数と育成さ
れたｓ７単結晶膜の格子間定数が完全に一致する結晶面
がなく、ぜいぜい数優の格子足紋差におさめるのが最良
であり、ために１日ｉ雛結晶膜に結晶欠陥が多すと云う
欠点がある。However, in the conventional technology, the grown single crystal semiconductor s
Since there is no crystal plane in which the interstitial constant of the substrate sapphire single crystal and the interstitial constant of the grown S7 single crystal film perfectly match each other, it is best to keep the lattice pattern difference within a few orders of magnitude at most. Therefore, there is a drawback that there are many crystal defects in the 1-day i chick crystal film.

さらに、前記サファイヤ基板か高価であり、この様な絶
縁体上の単結晶半導体膜を用いて高速の半導体装首を製
作する事への要望が大きいにも拘らず、実用化が遅れて
いる。Furthermore, the sapphire substrate is expensive, and although there is a strong desire to manufacture a high-speed semiconductor head using a single crystal semiconductor film on such an insulator, its practical implementation has been delayed.

本発明はかかる欠点をなくシ、低価格で結晶欠陥の少な
い絶縁体上に半導体単結晶膜を形叙した高速の半導体装
置用の半導体基板を提供することを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to eliminate such drawbacks and to provide a semiconductor substrate for a high-speed semiconductor device, which is inexpensive and has a semiconductor single crystal film formed on an insulator with few crystal defects.

上記目的を連取するための本発明の基本的な構ｆｉｓｊ
Ｈ，第１の固体表面の一部にはＷＸ２の固体単結晶から
力る箪結晶、育放種が設けられ、該固体雛結晶前面種に
少なくと４接して盾り、且つ第１の固体表面を被覆した
多結晶また＃′ｉアモルファス状態のｌ１Ｅ２と同一材
料からなる膜また＃−ｊ第３の固体材料膜が形成されて
ぼった基板を形散し、Ｕ基板を前記固体材料膜の融点よ
りわずかに低温に保ちながら小な（とも前記固体単結晶
育放種と前記固体材料膜とが接しｔ部分から電子線ある
Ｌ／−ｈは光線等のエネルギービームを照射して融解し
ながら移動走査シカ前１．＝エネルギー・ビームにより
槙ｌの固体表面上の前記固体材料膜や実質的に連続して
融解と冷却過程による固体化による単結晶化を行ない、
前記固体材料膜を基板表面にお論て単結晶化することを
特徴とする。Basic structure of the present invention to achieve the above objectives
H, a part of the surface of the first solid is provided with a trough crystal and a growing seed that are drawn from the solid single crystal of WX2, and the solid chick crystal front seed is in contact with and shielded from at least 4 times, and the first solid The substrate on which the polycrystalline or #'i film made of the same material as the amorphous state l1E2 or the #-j third solid material film has been formed is scattered, and the U substrate is covered with the solid material film. While keeping the temperature slightly lower than the melting point, a small (L/-h) is irradiated with an energy beam such as a light beam from the part where the solid single crystal growth seed and the solid material film are in contact with each other and melted. Before moving the scanning scan 1. = The solid material film on the solid surface of Maki l is solidified by a substantially continuous melting and cooling process to form a single crystal by an energy beam,
The method is characterized in that the solid material film is placed on the surface of the substrate to form a single crystal.

以下、実施例を用すて本発明を詳細に述べる。Hereinafter, the present invention will be described in detail using Examples.

第１図は本発明の実施例を模式的に治しｔもので、１け
カーボン・ヒーターであり、１２ｏｏ℃〜１３００℃に
通電して保たれる。該カー６ボン・ヒータ値上には試料
がのせられ、該試料は８イ基板２の大部分が８４　Ｏｘ
　ｇｔＬ　Ｂ　ｉｓ１〜膜あるいはｓｈｏ！と５ｉ１Ｎ
４１Ｉ！の２層構造膜等の絶縁膜３が被覆され・該絶縁
膜３の一部がエツチングにより窓開けされ、下地ｓ６基
板を露出させ、該轟出ｓ４基板部を朧結晶ｓ４の前原種
部分４となし、それらの表面には多結晶８（膜５がｃｖ
Ｄ法によシ膨面され、該的結晶５＝ａＳの育鷹種４の部
分Ｋ［子線あるｖｈｈレーザー光線等のエネルギー・ビ
ーム６を２方向に実質的に綿状に照射して、多結晶８ｓ
ｆｉ５を部分的に１４００℃程度で融解しながら、Ｙ方
向に移動せしめることにより、融解した多結晶８ｉが冷
却過程で単結晶化した部分７がＹ方向に連続して放長し
、多結晶Ｓｉ膜５に全面単結晶日ｉ＠となる。FIG. 1 schematically shows an embodiment of the present invention, which is a single carbon heater and is maintained at a temperature of 120° C. to 1300° C. A sample is placed on the carbon heater value, and the sample is 84 Ox
gtL B is1~membrane or sho! and 5i1N
41I! An insulating film 3 such as a two-layer structure film is coated, a part of the insulating film 3 is opened by etching to expose the underlying S6 substrate, and the exposed S4 substrate part is used as the precursor part 4 of the hazy crystal S4. and polycrystalline 8 (film 5 is CV
Part K of the brood seed 4 of the target crystal 5 = aS, which has been expanded by the D method, is irradiated with an energy beam 6 such as a vhh laser beam having a consonant beam in two directions in a substantially cotton-like manner, crystal 8s
By moving fi5 in the Y direction while partially melting it at about 1400°C, the portion 7 in which the melted polycrystalline 8i has become a single crystal during the cooling process is continuously elongated in the Y direction, and the polycrystalline Si The entire surface of the film 5 becomes a single crystal layer.

試料基板の形態としては１石英等のガラスまたはセラミ
ック基［１１の表面又は基板１１に埋めこまれた状態の
挙結晶前面種となる単結晶Ｓ　ｉ　１２を鎮布ガラス等
で基板に貼付けるか、多結晶ｓｓ［１３ｆＣＶＤ法で形
成する場合りそのまＩｃＶＤ多結晶ｓ＝ｍｔ３で基板１
１と貼付けるかして構ｂｙされその上にｅｖＤｓｚｏｓ
膜１４がＭｌさ融形のものでも良い。The sample substrate may be in the form of a glass or ceramic substrate such as quartz (1) or a single crystal Si (12) embedded in the substrate (11), which serves as a crystallization front seed, may be attached to the substrate with a cloth glass or the like. , polycrystalline ss [13f When formed by CVD method, substrate 1 is directly formed with IcVD polycrystalline s=mt3.
You can paste 1 and evDszos on top of it.
The film 14 may be of Ml melt type.

この様にして形成された？縁体上の単結晶８１膜は育Ｗ
種の結晶性がそのまま保持された単結晶膜となり、結晶
欠陥が少なく、且つ基Ｍか“サファイヤの如く高価なも
のである必要はなく、低価格でかつ高速半導体素子製作
に適した基板が提供できるという効果がある。Was it formed like this? The single crystal 81 film on the edge is grown
The result is a single crystal film that maintains the crystallinity of the seed, has few crystal defects, and does not need to be an expensive substrate like sapphire, providing a low-cost substrate suitable for high-speed semiconductor device production. There is an effect that it can be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の実施例を模式的に示したものであり、
第２図は基板試料のその他の構Ｊ例の断面図を示しｔも
のである。 ｌ・・カーボン・ヒーター１２・・ｓ　ｓ　ｉｓ３．１
４・・ｅｍｌｌｌ　　４．１２−・単結晶前面種部分５
．１３・・多結晶８（膜　６・・エネルギー・ビーム　
７・・単結晶ｓ４膜　１１・ｅ絶縁基板。 以　　　上 出願人　株式会社雌訪精工舎 代理人　最　　上　　　　務FIG. 1 schematically shows an embodiment of the present invention.
FIG. 2 shows a sectional view of another example of the structure of the substrate sample. l...Carbon heater 12...s s is3.1
4.emllll 4.12-.Single crystal front seed part 5
．． 13... Polycrystalline 8 (film) 6... Energy beam
7. Single crystal S4 film 11.e insulating substrate. Applicant Mewa Seikosha Co., Ltd. Agent Mogami

Claims (1)

【特許請求の範囲】 ＋１１第１の固体表面の一部には第２の固体単結晶から
なる雛結晶育匠種が設けられ、該固体単結晶育放種に少
なくとも接してガリ、且つ第１の固体表面を被覆した多
結晶またはアモルファス状態の第２と同一材料からなる
膜また＃′ｉ厘３の固体材料膜が形放されてＷ　Ｏｆｃ
基飯を形敬し。 該基板を前記固体材料膜の融点工すわずかに低温に保ち
ながら少なくとも前記固体単結晶育匠橿と前記固体材料
膜とが接した部分から電子線あるいは光線等のエネルギ
ー・ビームを照射して融解しながら移動走査し、＃記エ
ネルギー―ビームにより第１の固体表面上の前記固体材
料膜を実質的に連続して融解と冷却過程による固体化に
よる単結晶化を行表論、前記固体材料膜を基板表面にお
いて単結晶化することを特徴とする単結晶膜の製造方法
。 （ＺｊｆｌｌＥｌの固体を絶縁体、単結晶固体材料膜な
単結晶半導体膜とすることを特徴とする特許請求の範囲
ａ１１項記献の単結晶膜の製造方法。 ＋３）Ｉｌｌの固体を８（単結晶基覆表面Ｋａｇｏ冨膜
または、Ｂ１５Ｎａ　ｌ１１等からなる絶縁膜を形放し
た基板また＃１ｓ（ｏ、等の絶縁基板となし、第２の固
体単結晶を前記第１の固体としてのＢｔｕ結晶基板を前
記絶縁膜の一部を除去し露出させた部分を日イ単結晶育
匠種部分となした基板となし、＃基板上に多結晶または
アモルファス状態のＢイ膜を被覆し、該８を膜を単結晶
ＢｉＭｉとなす事を特徴とする特許請求の範囲第１項記
載の単結晶膜の製造方法。[Scope of Claims] +11 A brood crystal breeding seed made of a second solid single crystal is provided on a part of the first solid surface, and a gully and a first A polycrystalline or amorphous film made of the same material as the second material coated on the solid surface of #'i3 is released and the W Ofc
Respect Kimeshi. The melting point of the solid material film is determined by irradiating the substrate with an energy beam such as an electron beam or a light beam from at least the portion where the solid single crystal growing rod and the solid material film are in contact with each other while keeping the substrate at a slightly low temperature to melt the solid material film. While moving and scanning, the solid material film on the first solid surface is substantially continuously melted by the energy beam and solidified through a cooling process to become a single crystal. 1. A method for producing a single-crystal film, characterized by forming a single crystal on the surface of a substrate. (The method for manufacturing a single crystal film according to claim a11, characterized in that the solid ZjflEl is an insulator, a single crystal solid material film, or a single crystal semiconductor film. A substrate with a Kago thick film or an insulating film made of B15Na l11 etc. on the surface of the crystal base or an insulating substrate such as #1s(o) is used, and the second solid single crystal is a Btu crystal as the first solid. A part of the insulating film is removed from the substrate, and the exposed part is used as a substrate for growing a single crystal, and a polycrystalline or amorphous B film is coated on the substrate. 2. A method for producing a single crystal film according to claim 1, wherein the film is made of single crystal BiMi.
JP56116008A 1981-07-02 1981-07-24 Preparation of single crystal film Granted JPS5820794A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP56116008A JPS5820794A (en) 1981-07-24 1981-07-24 Preparation of single crystal film
NLAANVRAGE8202526,A NL188550C (en) 1981-07-02 1982-06-22 METHOD FOR MANUFACTURING A SEMICONDUCTOR SUBSTRATE
GB08218306A GB2104723B (en) 1981-07-02 1982-06-24 Semiconductor substrate and method of manufacturing the same
DE19823224604 DE3224604A1 (en) 1981-07-02 1982-07-01 SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING A MONOCRISTALLINE LAYER
US06/723,708 US4576851A (en) 1981-07-02 1985-04-16 Semiconductor substrate
HK890/87A HK89087A (en) 1981-07-24 1987-11-26 Method of manufacturing semiconductor substrate and substrate so manufactured
US07/171,370 USRE33096E (en) 1981-07-02 1988-03-17 Semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56116008A JPS5820794A (en) 1981-07-24 1981-07-24 Preparation of single crystal film

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP9943888A Division JPS63285184A (en) 1988-04-22 1988-04-22 Method for manufacturing single crystal film

Publications (2)

Publication Number Publication Date
JPS5820794A true JPS5820794A (en) 1983-02-07
JPS6234716B2 JPS6234716B2 (en) 1987-07-28

Family

ID=14676540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56116008A Granted JPS5820794A (en) 1981-07-02 1981-07-24 Preparation of single crystal film

Country Status (2)

Country Link
JP (1) JPS5820794A (en)
HK (1) HK89087A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051688A (en) * 1983-08-29 1985-03-23 Nippon Hoso Kyokai <Nhk> Segregating method of impurity
JPS60159631U (en) * 1984-04-03 1985-10-23 株式会社　オリエント総業 Marking device for strips

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051688A (en) * 1983-08-29 1985-03-23 Nippon Hoso Kyokai <Nhk> Segregating method of impurity
JPS60159631U (en) * 1984-04-03 1985-10-23 株式会社　オリエント総業 Marking device for strips

Also Published As

Publication number Publication date
HK89087A (en) 1987-12-04
JPS6234716B2 (en) 1987-07-28

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