JPS5853507B2 - Handout Taisouchino Seizouhouhou - Google Patents

Handout Taisouchino Seizouhouhou

Info

Publication number
JPS5853507B2
JPS5853507B2 JP49063574A JP6357474A JPS5853507B2 JP S5853507 B2 JPS5853507 B2 JP S5853507B2 JP 49063574 A JP49063574 A JP 49063574A JP 6357474 A JP6357474 A JP 6357474A JP S5853507 B2 JPS5853507 B2 JP S5853507B2
Authority
JP
Japan
Prior art keywords
passivation film
window
taisouchino
seizouhouhou
handout
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP49063574A
Other languages
Japanese (ja)
Other versions
JPS50156357A (en
Inventor
義光 広島
亨 高村
彰 佐野
泉 室園
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP49063574A priority Critical patent/JPS5853507B2/en
Publication of JPS50156357A publication Critical patent/JPS50156357A/ja
Publication of JPS5853507B2 publication Critical patent/JPS5853507B2/en
Expired legal-status Critical Current

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Description

【発明の詳細な説明】 本発明は半導体ウェハを個々のチップに分割する方法に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for dividing a semiconductor wafer into individual chips.

ウェハを分割する方法としては何種類かの方法があるが
、最も一般的に用いられているのがスクライブ方式であ
る。
There are several methods for dividing a wafer, but the most commonly used method is the scribing method.

すなわち先端を研磨したダイヤモンド等によって半導体
基板上に傷線を引き、クラックを入れて切断する方法で
ある。
That is, this is a method in which a scratch line is drawn on the semiconductor substrate using a diamond or the like with a polished tip, a crack is created, and the semiconductor substrate is cut.

最近では線引きにレーザを用いるレーザスクライブ法も
さかんに使われるようになった。
Recently, the laser scribing method, which uses a laser for drawing lines, has become popular.

このスクライブ工程の問題として、拡散工程を終えたチ
ップ表面の汚染や傷の発生がある。
Problems with this scribing process include the occurrence of contamination and scratches on the chip surface after the diffusion process.

実際、傷線をつける時に切り屑や塵あいがチップ表面に
付着することは避けられない。
In fact, it is inevitable that chips and dust particles will adhere to the chip surface when making scratch lines.

これらの付着物を取り除くには一般にスクライバに集塵
器をつけたり、線引き後有機溶剤での洗滌がおこなわれ
ている。
To remove these deposits, the scriber is generally equipped with a dust collector or washed with an organic solvent after drawing.

しかし、これらの方法では付着物を完全に取り除くこと
は困難である。
However, it is difficult to completely remove deposits using these methods.

特にレーザスクライブ法では第1図に示すように溶融飛
沫3または塵あい3′が半導体基板上1に被着したパッ
シベーション用ガラス層2に焼きつき、除去することは
ほとんど不可能である。
Particularly in the laser scribing method, as shown in FIG. 1, molten droplets 3 or dust particles 3' are burned into the passivation glass layer 2 deposited on the semiconductor substrate 1, making it almost impossible to remove them.

なお、4は線引き溝を示す。本発明はこの問題点を解決
して、チップ表面に損傷を与えることのないスクライブ
方法を提供するものである。
Note that 4 indicates a line drawing groove. The present invention solves this problem and provides a scribing method that does not damage the chip surface.

すなわち、チップ表面上に保護用感光性樹脂皮膜(以後
レジスト膜と称す)を形成した後スクライバにより傷線
をつける方法である。
That is, this is a method in which a protective photosensitive resin film (hereinafter referred to as a resist film) is formed on the chip surface and then a scratch line is created using a scriber.

上記レジスト膜にはパッシベーション用りんガラス層の
パッド窓あけに使用したレジスト膜を剥離しないで、そ
のまま用いるのが工数を増すこともなく最も効率的であ
る。
It is most efficient to use the resist film used for opening the pad window of the passivation phosphor glass layer as it is without peeling it off, without increasing the number of steps.

なお、保護効果を高める上からは上記レジスト膜厚は厚
い(0,5μ以上)方が好ましい。
In addition, from the viewpoint of enhancing the protective effect, it is preferable that the resist film is thick (0.5 μm or more).

第2図は本発明によるスクライブ線引き後のウェハ断面
図である。
FIG. 2 is a sectional view of a wafer after scribing according to the present invention.

上記線引き溝4の形成中に発生する溶融飛沫3や塵あい
3′は第1図に見られるようなチップ表面に直接ふれる
ことなく、上記レジスト膜5上に付着する。
Melt droplets 3 and dust particles 3' generated during the formation of the line drawing grooves 4 adhere to the resist film 5 without directly touching the chip surface as shown in FIG.

この後、一般に行なわれている化学的溶解や加熱分解等
により上記しシスト膜5を取り除くと、それに付着した
飛沫3やや塵あい3′もともに完全に除去される。
Thereafter, when the above-mentioned cyst film 5 is removed by chemical dissolution or thermal decomposition, which is generally carried out, both the droplets 3 and dust particles 3' attached thereto are completely removed.

本発明によるスクライブ法では半導体装置の特性あるい
は外観上での不良に結びつく付着物をパツシベーショ4
の窓開けに用いた樹脂膜を用いて2完全に取り除くこと
ができ、本来の工程の工数を増加させることなくスクラ
イブ工程での歩留りを大幅に向上させる。
The scribing method according to the present invention removes deposits that lead to defects in the characteristics or appearance of semiconductor devices.
2 can be completely removed using the resin film used to open the window, greatly improving the yield in the scribing process without increasing the number of steps in the original process.

特にチップ表面の汚れが許されない光学素子の製造には
その効能は犬である。
Its effectiveness is especially important in the production of optical elements where contamination of the chip surface is not allowed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のスクライブ線引き後の半導体装置の略図
的断面図、第2図は本発明による同断面図である。 1・・・・・・半導体基板、2・・・・・・パッシベー
ション用ガラス層、3・・・・・・飛沫、3′・・・・
・・塵あい、4・・・・・・線引き溝、5・・・・・・
保護用レジスト膜。
FIG. 1 is a schematic cross-sectional view of a semiconductor device after drawing a conventional scribe line, and FIG. 2 is a cross-sectional view of the same according to the present invention. 1...Semiconductor substrate, 2...Glass layer for passivation, 3...Splash, 3'...
・・・Dust gap, 4... Line drawing groove, 5...
Protective resist film.

Claims (1)

【特許請求の範囲】[Claims] 1 多数の半導体装置が形成された半導体ウニ/’%の
表面のパッシベーション膜に感光性樹脂被膜を形成して
前記パッシベーション膜に窓を穿設する工程と、前記樹
脂被膜を除去することなくレーザあるいはダイヤモンド
などを用いたスクライバにより前記窓に露出する前記半
導体ウェハに分割用の傷線を入れる工程と、前記樹脂膜
を除去する工程とを有することを特徴とする半導体装置
の製造方法。
1 A process of forming a photosensitive resin film on a passivation film on the surface of a semiconductor device on which a large number of semiconductor devices are formed, and drilling a window in the passivation film, and a process of forming a photosensitive resin film on a passivation film on the surface of a semiconductor device on which a large number of semiconductor devices are formed, and drilling a window in the passivation film, and a process of forming a photosensitive resin film on a passivation film on the surface of a semiconductor device on which a large number of semiconductor devices are formed, and drilling a window in the passivation film, and a process of laser or A method for manufacturing a semiconductor device, comprising the steps of: making a dividing line on the semiconductor wafer exposed in the window using a scriber made of diamond or the like; and removing the resin film.
JP49063574A 1974-06-04 1974-06-04 Handout Taisouchino Seizouhouhou Expired JPS5853507B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP49063574A JPS5853507B2 (en) 1974-06-04 1974-06-04 Handout Taisouchino Seizouhouhou

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP49063574A JPS5853507B2 (en) 1974-06-04 1974-06-04 Handout Taisouchino Seizouhouhou

Publications (2)

Publication Number Publication Date
JPS50156357A JPS50156357A (en) 1975-12-17
JPS5853507B2 true JPS5853507B2 (en) 1983-11-29

Family

ID=13233147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP49063574A Expired JPS5853507B2 (en) 1974-06-04 1974-06-04 Handout Taisouchino Seizouhouhou

Country Status (1)

Country Link
JP (1) JPS5853507B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0234103U (en) * 1988-08-31 1990-03-05

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3699644A (en) * 1971-01-04 1972-10-24 Sylvania Electric Prod Method of dividing wafers

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0234103U (en) * 1988-08-31 1990-03-05

Also Published As

Publication number Publication date
JPS50156357A (en) 1975-12-17

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