JPS5856534A - Frequency generating system - Google Patents

Abstract

PURPOSE:To obtain a group and a supergroup pilot frequency generating system without need of frequency maintenance, by comparing a frequency of a main oscillator and a pilot frequency and driving a voltage controlled oscillator with the comparison output via an up-down counter. CONSTITUTION:In a generating system of group/supergroup pilot frequency of an FDM carrier device, a fundamental frequency fFUND from a main oscillator 1 is 1/N-frequency-divided at a frequency-divider 2 to be a reference frequency fs and inputted to a frequency converter 3. An output of a voltage controlled oscillator VCO5 is 1/M-frequency-divided at a frequency divider 4 to be a frequency fm and inputted and compared with the fs at the comparator 3. The output of the comparator 3 controls an up-down counter 6 to +1, -1 or as it is depending if the fm is higher, lower than or equal to the fs. The output of the counter 6 is inputted to a D/A converter 7 to control the frequency of the VCO5 with a voltage proportional to the count value and this operation is continued until the fs is equal to the fm. The frequency of the VCO5 is 1/L- frequency-divided at a frequency divider 8 and outputted from a filter 9 as a specified frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for generating group and supergroup pilot frequencies for FDM carriers. To explain further, this is a frequency generation method that automatically adjusts the frequency generated based on the highly stable fundamental frequency of the main oscillator.

Conventionally, each frequency used in an FDM transport device is generally generated by multiplying a reference frequency of 4KH2. However, the group, supergroup biay) frequency is, for example, 84.08KHz.
, 411.92KH2 etc. and the main oscillator's 4KH2 fundamental wave), it will be performed at the fathom of OH2, and when switching from the fundamental wave from working to standby, a long frequency shift will occur due to the phase hit, and the A large impact. In addition, since these are not multiples of 4KH2, it is difficult to synthesize them, so conventionally, (1) independent oscillator configuration, (2) multi-stage modulator configuration,
(3) A PLL method or the like is used.

The above (1), (2), and (3) have the following drawbacks. (1) not only requires an oscillator with high frequency stability, but also requires periodic maintenance of the frequency. (2) uses a large number of modulators and filters, so the circuit configuration is Py
J becomes sloppy. (3) uses a low frequency for the fundamental wave, so it takes time to pull in the phase of the fundamental wave when the main oscillator is switched between working and standby, which may have a negative impact on the communication line. 0 In order to solve the above-mentioned drawbacks, the present invention provides a group/supergroup pilot frequency generation system that does not require frequency maintenance.

For this purpose, the frequency of the main oscillator and the pilot frequency are detected by a frequency comparison circuit to determine whether the frequency is high, low, -, t, the comparison output is used to control an up/down/counter, and the output of the counter is set to D. This is a frequency generation method that generates /A conversion.

Note that the fundamental frequency fFUND of the main oscillator 1 is divided by 1/N to obtain the reference frequency fs, and the center frequency of vCO is L
Let fp be the frequency, divide it by 1/M, and select frn.

The up/down counter 6 operates with the outputs compared by the frequency comparator 3, and when the counter 6 operates the VCO 5 via the D/A converter 7, the output of the counter 5 is stepped. Since the residual w frequency factor 2- is the maximum step of the converter to the frequency variable width /D/ of the VCO, a shallow frequency error of ±1 bit remains. In order to stabilize the number of frequencies, the following equation is used.

Required frequency stability of group and supergroup pilots>residual frequency error...(2). The frequency variable width of the oscillator is selected to be larger than the expected frequency deviation (initial deviation, frequency drift due to degree change, frequency drift due to aging, etc.), making it possible to avoid unstable oscillators (oscillators with a wide variable range). ), it is necessary to increase the maximum number of steps of the D/A converter.

The required frequency stability of groups and supergroups is approximately ±l0×10−, respectively.
' and ±2XIF', so the frequency variable width is ±100
If you use a VCO with an X1 needle, ±7 bits (
= ±128 steps) D/A converter is sufficient. That is, the residual frequency error in this case is less than lXl0-4.

A pilot frequency excavator with such a configuration can suppress the output voltage of the D/A converter to a small level even when the input fundamental wave is switched or momentarily interrupted, so the sensitivity to changes in the output frequency is also reduced. I can do things.

FIG. 1 shows an embodiment of the present invention, FIG. 2 shows another frequency frn compared with the divided wave fm of the main oscillator, and FIG. 3 shows a frequency comparison waveform and a differential pulse.

In the figure, the fundamental frequency fFUND of the main oscillator l is divided by 1/N to a predetermined frequency by a frequency divider 2, and the divided reference frequency fs is input to a frequency comparison circuit 3. In addition, the output frequency divider 4 of the voltage controlled oscillator (hereinafter referred to as ■CO) 5
The frequency is divided into 1/M by , and the frequency fm is inputted to the frequency comparison circuit 3 and compared with fl.
There are three cases in which the frequency fm (hereinafter referred to as fm) 7E is higher, lower, or the same as the frequency fm (hereinafter referred to as fm). Based on the comparison result, the shift down counter 6 is controlled to +1, -1, or the current value of it, and the output of the counter 60 controls the frequency of vcos with a voltage proportional to the count value of the D/A converter 7. This frequency comparator 3 - up/down counter 6 - D/A converter 7
-vcos- The loop of frequency divider 4 is the reference frequency J's and V
Operation continues until the CO5 frequencies match.

The frequency fm of 1/M of vcos matches fl, and the frequency of the signal 5 is divided by 1/L by the divider 8 and outputted as a predetermined frequency from the filter 9.

Next, based on Fig. 2 and Fig. 3, the frequency fm of fI and fm (
(hereinafter referred to as fm) is input, and the ratio of these frequencies is 1=
A comparison in case 1 will be described.

(1) and (2) in Figure 2 (a) are f with a frequency ratio of 1:1.
In the diagram showing m and fm, fth is higher than fm by Δf. (3)' is when ftz (1) and fm (2) are input to flip 70 flop 12.
The output waveform of is shown.

FIG. 2(B) shows a sawtooth double-wave phase comparator that constitutes the frequency comparator circuit 3. With this, the frequency comparison between fm and h is explained using the waveforms in FIG. 2(A) and FIG. In the figure, each of f # (IL fm (2) is differentiated by the respective differentiating circuits 10 and 11, and when the differentiated waveforms are input to the 7-lip frog 12, the output waveforms are as shown in Figure 4A.
(3). The waveform (3) is shaped into a sawtooth waveform (4) by a low-pass filter 13, and further shaped into a differential waveform (5) by a high-pass filter 14. Differential waveform (
5) is input to the comparator 15, and an up clock or a down clock is output depending on the condition of high or low frequency to control the up/down counter 6. The comparator 15 shown in FIG.
17, positive and negative reference voltages V(g), and ■(→).

In the figure, when the frequency fs>fm, the differential waveform output from the high-pass filter 14 is output as a falling sinocles (5)-1, and the converter 16 outputs a falling synocles (5)-1. The clock is input to the up/down counter 6, and the count value is incremented by one. The waveforms are explained in detail in Figure 4, @.

The figure shows the case where fI (1) > fm (2), and fs
The phase shift between (1) and fm(2) changes with time,
The output voltage of the flip-flop 12 is shaped into a sawtooth waveform by passing the waveform (3) through an appropriate low-pass filter 3 and averaging it, and shaping it into a sawtooth waveform by a high-pass filter 14. )-i. When the phases of both coincide, the maximum value B becomes 0 of fm (tK
When fm (2), the reverse waveform diagram CB) (3) t (
4) and (5) are obtained.

The output waveform (4) of the low-pass filter decreases as shown by the dotted line B, and rises at B. It is high-pass filtered and the count value of the up/down counter 6 is increased by one.

Above we have described the case where the ratio of fs(1) and fm(2) is 1:1, but fI:fm=1:n or n:1(nU'l
The same method can be used for the case of I number). In other words, even if fm :fm=1:n, f
Since the output of the flip-flop 12 reset at m has a sawtooth wave phase comparison characteristic, the rising and falling pulses are shaped as described above, and these rising and falling pulses are passed through the comparator 15 to the up/down counter. According to the present invention, since a new frequency is generated compared to the reference oscillator, a highly accurate frequency can be obtained. That is, no maintenance work is required.

Furthermore, since the comparison is made in terms of frequency, only a transient fluctuation within two bits of the D/A converter with respect to the phase hit of the reference frequency reference, that is, a frequency transient fluctuation of the same degree as the residual frequency error is sufficient.

[Brief Description of the Drawings] Fig. 1 shows an embodiment of the present invention, Fig. 2 shows waveforms fm, frn, output waveforms, and a sawtooth wave phase comparator, Fig. 3 shows a comparator, and Fig. 4 shows the Fig. 2 The sawtooth wave phase ratio of 0 shows the waveform at each point of the comparator. s is up/down e counter,)
is a D/A converter, and 8 is a frequency divider. 9 is a filter, 10.11 is a differential circuit, 12 is a flip 70 tube, 13 is a low-pass filter, and 14 is a high-pass filter S.
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Claims (1)

[Claims] In the group and supergroup conversion pilot generation method used in the FDM carrier, the fundamental frequency generated in the main oscillator and the frequency of the pilot oscillator are compared, and three types of information of high frequency, low frequency, and coincidence are determined, Upload the judgment information
input to a down counter and output the counter to D/A
A frequency generation method characterized in that input is input to a converter, and the frequency of the pilot oscillator is controlled by the output of the converter.