JPS5858723B2 - Eizo Kiroku Saisei Souchino Syoukiyo Cairo - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an erasing circuit for a video recording and reproducing apparatus using a magnetic disk, a magnetic sheet, or the like as a recording medium, and particularly relates to an improvement in a pulse erasing circuit.

Conventionally, in recording and reproducing devices that use magnetic sheets or magnetic tapes as recording media, there are several methods for erasing signals recorded on the recording medium: ■ Bulk erasing method ■ AC erasing method ■ DC erasing method ■ AC combined erasing method be.

These conventional erasing methods are not suitable for erasing video recording and reproducing apparatuses that use magnetic sheets, magnetic disks, or the like as recording media.

In other words, (1) the bulk erase method erases data by inserting a magnetic sheet into the magnetic field of the commercial power frequency;
In objects that rotate at a frequency of z, there are parts that cannot be erased in a short time.

(It can be erased if it is erased for a sufficiently long time, but in this case too, if the rotation speed of the magnetic sheet is synchronized with the commercial power frequency, there will be parts that cannot be erased.

) (2) In the AC erasing method, in order to perform complete erasing, the maximum magnetic flux at the gap part of the erasing head must be large enough to saturate the magnetic sheet, and the number of alternating magnetic fluxes in the magnetic field during the decay period must be sufficiently large. is necessary.

For this reason, when the rotation speed is high as in the case of a magnetic sheet, a very high frequency is required, and the impedance of the erasing head increases accordingly, requiring a large amount of power.

(3) The DC erasing method requires less current, but since it is a method of erasing by saturating in one direction, the noise after erasing is large and the subsequently recorded waveform is distorted.

(4) The AC/DC erasing method is a method that uses both AC and DC current, and first erases the previous signal with a sufficiently large DC current, and then performs AC erasure to remove distortion and noise from the recorded waveform. .

However, in any case, AC erasing requires a very high frequency when the rotational speed is high as in the case of a magnetic sheet, which is not preferable.

(5) The pulse erasure method is a method in which positive and negative pulses are applied alternately, and the magnitude of the pulses is gradually reduced to bring the residual magnetic flux close to zero.

However, this conventional pulse method has a complicated circuit, requires both positive and negative power supply voltages, and because the erase pulse width is fixed, the residual magnetic flux tends to be zero regardless of the type or variation of the magnetic sheet. Therefore, erasure may be incomplete.

The present invention eliminates the drawbacks of the various conventional erasing methods as described above, and in particular simplifies the conventional pulse erasing method.
This is to perform complete erasure.

Figure 1 shows a block diagram of the conventional pulse erasure method.
Normally, a signal input of 60H7,) is applied to the pulse generator 2, and when the erase command switch 1 is closed to manually execute the erase command, the output of the pulse generator 2 has the pulse width necessary for erasing. The cycle of success: Occurs.

3. 4, 5, 6... are pulse forming circuits for forming pulses having respective erasing pulse widths,
? , 8, 9, 10, . . . are switching circuits that open gates in response to input commands of the respective pulses.

The output pulses of the pulse generator 3 are sent to the switching circuit 1,
The output pulses of the pulse generator 4 are sent to the switching circuit 8.
The output pulses of the pulse generator 5 are sent to the switching circuit 9.
・・・・・・・・・Each can be added.

Therefore, the switching circuit 7 opens the gate in response to the command of the output pulse from the pulse generator 3 and the positive power supply voltage (10B) is applied.
is applied to the erasing head 11.

Further, the switching circuit 8 opens the gate according to the command of the output pulse of the pulse generator 4, and applies a negative power supply voltage (-B) to the erasing head 11.

Because of the resistor R1, the li width of the 4th output pulse is smaller than that of the 3rd output pulse.

Thereafter, similarly, each pulse is gradually lowered by the relationship between the resistors R2 and R3 and is applied to the erasing head 11, approaching zero.

Therefore, as described above, the conventional erase pulse method has a complicated circuit and requires both positive and negative (+B, -B) power supply voltages.

DESCRIPTION OF THE PREFERRED EMBODIMENTS An erasing circuit for a video recording and reproducing apparatus according to an embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 2 shows a block diagram of the device of the invention.

In the figure, ■ is a vertical synchronizing signal or a commercial power supply frequency (60H7, for example).

12 is a pulse generator for determining the erase pulse width;
The width of the erase pulse is selected to be an integral multiple of the period of the rotational speed of the magnetic sheet.

13, 14 are pulse generators for generating pulse groups of mutually different polarities, 15, 16° 18.19 are switching circuits, 17 are switching circuits 15, 16, 18
, 19, an erase head disposed on the bridge, 20 a voltage drop circuit for gradually lowering the power supply voltage (10 B), 21 a switching circuit operated by a flip-flop 220 command, and 22 a flip-flop circuit. , ■ is the reproduction signal, ■ is the reset pulse signal when the power is turned on, 2
3 is a reproduction signal detection circuit for detecting the presence or absence of a reproduction signal; 24;
25 is a reset circuit that resets the pulse generator 14 and sets the clip-flop circuit 22 to a predetermined level (for example, low level) when there is a reproduction signal or when a power close reset pulse signal is input, and 25 is an erase command switch. When the erase command switch is closed, the flip-flop 22 operates and the switching circuit 21 is made conductive.

At this time, the voltage drop circuit 20 also becomes conductive, and the voltage drop circuit 20
The power supply voltage (10B) appears as is at the output.

At this time, if there is a reproduction signal of ○, the pulse generator 14 is in a reset state, and only the switching circuits 15 and 19 are turned on based on the output pulse of the pulse generator 13.

In this way, the power supply voltage (10 B) is applied to the erasing head 17 until the reproduced signal is erased.

When the reproduced signal @ is erased, the reset circuit 240 circuit operates to release the reset signal to the pulse generator 14, and operates the flip-flop 22 to reset the switching circuit 21.
is made non-conductive, and thereafter the output voltage of the voltage drop circuit 20 gradually decreases.

A voltage waveform as shown in FIG. 3 is applied to the terminal @-(E of the erasing head 1γ to make the residual magnetic flux zero.

The width of the erase pulse mentioned above is desirably selected to be an integral multiple of the period of the rotational speed of the magnetic sheet.

To explain this using the drawings of FIGS. 3 and 4 as an example, the first erasing pulse is mainly for erasing the rapture image signal recorded on the magnetic sheet, and each subsequent erasing pulse is for the next one. This erase pulse is used to reduce residual magnetic flux to zero in order to record signals without distortion.

Therefore, there is no problem as long as the width of the first erasing pulse is sufficiently wide, but when considering the operation after erasing (for example, starting recording), the shorter the erasing time is, the better.

The relationship between erasure rate and erasure time varies depending on the pulse width.
Along with this, the residual magnetic flux also differs.

Each subsequent erase pulse has a smaller current than the first erase pulse, resulting in no saturation no matter how long it takes.

Therefore, if the current value of this erase pulse current is different, the fourth
As shown in the Co-b curve in the figure, the residual magnetic flux does not become zero; if the time is long, it becomes b'-c', and if the time is short, it becomes b"-d.
', and the residual magnetic flux does not become zero, which is undesirable.

In other words, on the same circumference, a positive part and a negative part where the residual magnetic flux is zero are created.

To prevent this, the residual magnetic flux can be set to zero by setting the erasing pulse width to be twice the number of revolutions of the magnetic sheet and appropriately adjusting the current value of each erasing pulse following the first erasing pulse.

In this case, each erase pulse width does not necessarily have to be selected to be the same pulse width.

FIG. 5 shows an example of a specific circuit diagram of the erasing circuit of the video recording and reproducing apparatus of the present invention, and FIG. 6 is a timing chart of the circuit.

■ is the vertical synchronization signal or the commercial power frequency (for example, 6
0Hz).

A flip-flop "FF" (downloads the frequency of the half-vertical synchronizing signal to 1/2, 30H, Z).

The reset output Q1 of the flip-flop FF1 is input to the cent terminal T1 of the flip-flop FF2, and the outputs Q2 and Q2 of the flip-flop FF2 are 1/2 with different polarities.
An erase pulse with a pulse width of 30 seconds is output.

When the output Q2 of the flip-flop FF2 is at the L level (Q2 is at the H level), the transistor TR1 is conductive, and therefore the transistors TR2 and TR5 are conductive.

At this time, the transistor TR6 is non-conductive, so the transistors TR3 and TR4 are non-conductive, and the erase head He
Current flows from terminal @ to terminal O.

Also, the output Q2 of flip-flop FF2 is at H level (Q2
is at L level), the reverse is true, and a current flows through the erase head He from the terminal ■ to the terminal @.

Capacitors C4, C5, diode D1. D2, the transistor TR1o, and the resistor RI3 are a DC amplifier that detects the presence or absence of a reproduction signal (reproduced signal from the video head).When there is a reproduction signal, the collector voltage of the transistor TR1o becomes zero potential. When there is no reproduction signal, it becomes the power supply voltage.

■ is the power supply close reset signal, and N0RI is N0R(
When the power supply close set signal (2) or the reproduction signal (@) is erased and becomes zero at the NOR) gate, a flip-flop FF3 heliset signal is output.

The switch SW1 is an erase command switch, SW2 is a recording switch, and SW3 is a reproduction switch.

When the erase command switch SW1 is closed, a set signal is sent to the Noritsu flop FF3, and Q3 is set to L level.

This resets the flip-flop FF2 and makes the transistor TR9 non-conductive.

Therefore, transistor TR8 is conductive, transistor TR7
Since the transistor TR7 also becomes conductive, the emitter voltage (2) of the transistor TR7 becomes 10B (power supply voltage).

At this time, a current flows through the erasing head He from the terminal @ toward the terminal O.

Next, when the reproduced signal ○ becomes zero after erasure, the seven-lip flop FF3 is reset, so that the transistor TR9 becomes conductive, the transistor TR8 becomes non-conductive, and the emitter voltage of the transistor TR7 gradually drops.

At this time, in order to also cancel the reset of the Noritsubu FF2, an erase current flows alternately from the terminal @ to O and from the terminal O to @ in the erase head He according to the output Q2 of the flip-flop FF2 and the pulse of Q2. The current value gradually decreases to bring the residual magnetic flux of the magnetic sheet to zero.

Here, NAND (NAND) gate, NANDl, flip-flop FF4, resistor R1□y R18t R1
9, transistor TR, and relay RY define the recording state and reproduction state.

That is, when erasing, it is necessary to be in the reproducing state, and when the erasing command switch SW1 is closed, the flip-flop FF4 is reset and the relay RY is put in the inactive state (this time is set as the recording state).

). When the regeneration switch SW3 is closed, the flip-flop FF4 is set, and the relay is put into an operating state (this time is called a regeneration state).

). To obtain the playback signal, press the erase command switch SW.
At the same time as closing circuit 1, it is necessary to keep other circuits (signal systems) in a reproducing state.

FIG. 6 is a timing chart in the erasing circuit of FIG. 5.

In the figure, to is the time when the power switch is closed, tl is the time when the erase command switch SW1 is closed, and t2 is the time when the reproduction signal is erased and becomes zero.

■ is the vertical synchronization signal or commercial power supply frequency, 0□ is the reset output of flip-flop FF1, Q2 and Q2 are the outputs of flip-flop FF2, respectively, O is the reproduction signal,
■ is the power supply closing reset pulse, R3 is the input terminal of the flip-flop FF3 that introduces the reset pulse output of N0R1, and S3 is the Noritsu flop F that introduces the set pulse signal generated by closing the erase command switch SW1.
The input terminal of F3, Q3 is the reset output of flip-flop FF3, ■ is the emitter voltage of transistor TR7, @
-〇 is a current (or voltage) pulse waveform appearing in the erasing rad He.

Therefore, when there is a reproduction signal on the magnetic sheet, current flows from the terminal @ to O in the erasing head, and when there is no reproduction signal on the magnetic sheet, the current flows from terminal @ to 0. A current flows alternately from O to @, and the current value gradually decreases as shown in the waveform diagram to bring the residual magnetic flux of the magnetic sheet to zero.

The voltage drop circuit for gradually reducing the current value (corresponding to block diagram 9 in FIG. 2) is composed of a charging/discharging circuit consisting of a transistor TR7, a capacitor C3, and a resistor R9.

Further, in the above-described embodiment, a switching element is used in the switching circuit, but it goes without saying that it can be configured as a transformer coupling or the like.

As described above, according to the erasing circuit of the video recording and reproducing apparatus of the present invention, the drawbacks of various conventional erasing methods can be overcome, and compared to the conventional pulse erasing method, there is no need for both positive and negative power supplies, and a single power supply is used. It can be done only by

Furthermore, it detects the reproduced signal from the recording medium before erasing, and after the reproduced signal is completely erased, the residual magnetic flux is reduced to zero. This has the effect that it can be erased in seconds.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional pulse erasing method, FIG. 2 is a block diagram of an erasing circuit of a video recording and reproducing apparatus showing an embodiment of the present invention, and FIG. 3 is an erasing pulse waveform diagram of the above erasing circuit. Figures 4a, 4c, and 4 are magnetization characteristic curve diagrams for explaining the eraser circuit shown above, Figure 5 is a specific circuit diagram of an embodiment of the eraser circuit shown above, and Figure 6 is a time diagram of the eraser circuit shown in Figure 5 above. It is a chart. In the figure, ■: Vertical synchronization signal or commercial power supply frequency, 12
: Erasing pulse generator, 13: Positive pulse group generator, 14:
Negative pulse group generator, 15, 16° 18. 19 Niswitching circuit, 17: Erase head (He), 20: Voltage drop circuit, 21 Niswitching circuit, 22: Flip-flop circuit, 23: Reproduction signal detection circuit, 24: Reset Circuit, 25: Erase command switch (SWl), SW2: Recording switch, SW3: Playback switch, 10B: Power supply voltage.

Claims (1)

[Claims] 1 Pulse erasing method of a video recording and reproducing apparatus that applies pulses to an erasing head to erase information recorded on a recording medium such as a magnetic sheet. pulse frequency dividing circuit means for dividing the frequency into an integral multiple of the period; a pulse generator for separately generating two pulses of different polarities based on the output of the frequency dividing circuit; and presence or absence of a reproduced signal from the recording medium. a reproduction signal detection circuit means for detecting a reproduction signal; and a reproduction signal detection circuit means for keeping the pulse generator in a reset state while the reproduction signal is being detected based on the output of the reproduction signal detection circuit, and when the reproduction signal is no longer obtained, the pulse generator reset circuit means for canceling the reset state of the reset state, and the erase head is disposed on a bridge between the four switching elements, and each switching element is controlled to switch based on the pulse output from the pulse generator. When a reproduced signal is detected, two specific switching elements are made conductive to flow a current in a certain direction to the erasing head, and when the reproduced signal is no longer present, the above two switching elements and the remaining two switching elements are alternately made conductive. switching circuit means for sequentially reversing the direction of the current flowing through the erase head; and a voltage drop circuit for gradually lowering the power supply voltage applied to the switching circuit means when a reproduced signal is no longer obtained based on the output of the reset circuit. 1. An erasing circuit for a video recording and reproducing device, comprising: means.