JPS5873221A - Oscillator - Google Patents

Oscillator

Info

Publication number
JPS5873221A
JPS5873221A JP56171899A JP17189981A JPS5873221A JP S5873221 A JPS5873221 A JP S5873221A JP 56171899 A JP56171899 A JP 56171899A JP 17189981 A JP17189981 A JP 17189981A JP S5873221 A JPS5873221 A JP S5873221A
Authority
JP
Japan
Prior art keywords
circuit
capacitor
flip
output
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56171899A
Other languages
Japanese (ja)
Inventor
Kunihiro Yamada
邦博 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Elemex Corp
Ricoh Co Ltd
Original Assignee
Ricoh Elemex Corp
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Elemex Corp, Ricoh Co Ltd filed Critical Ricoh Elemex Corp
Priority to JP56171899A priority Critical patent/JPS5873221A/en
Publication of JPS5873221A publication Critical patent/JPS5873221A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K7/00Modulating pulses with a continuously-variable modulating signal
    • H03K7/06Frequency or rate modulation, i.e. PFM or PRM

Abstract

PURPOSE:To simplify the circuit constitution and to reduce the cost, by controlling the depth of modulation independently of the center frequency. CONSTITUTION:When an output of a flip-flop 6 is denoted as 1, a switch 3 is connected to the position (a), and a capacitor C is charged with a current source 1. Inversely, the output of the circuit 6 is denoted as 0, the switch 3 is connected to the position (b) and the charge in the capacitor C is discharged to a current source 2. When a potential VOSC of the capacitor C is higher than a reference voltage Vu of a comparator 5, the output of the comparator goes to 1 to reset the circuit 6 and the output goes to 0. Inversely, when the potential VOSC is lower than a reference potential Vl of a comparator 4, the output of the circuit 6 goes to 1. Thus, the oscillating frequency (output of the circuit 6) can be controlled with currents i1 and i2. Further, the depth of modulation can be controlled with the voltages Vu and Vl.

Description

【発明の詳細な説明】 本発明は、発振器、特に、入力電圧によって発做周V数
が変化する電圧″fril伸1発振器(VCO)におい
て、変調の深さd(二Δf/fo)を中心周波数foと
は独立に制御できるようにし、もって、乗算器(又はL
OG(g回路、Anti −LOG l!ll!1路、
加簀器等)を不要とし、回路構成の闇路化及びコストの
低廉化を図ったものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides an oscillator, particularly a voltage frill-stretched oscillator (VCO) whose oscillation frequency varies depending on the input voltage. It is possible to control the frequency fo independently, so that the multiplier (or L
OG (g circuit, Anti-LOG l!ll!1 road,
This eliminates the need for filters (e.g., filters, etc.), reduces the circuit configuration and reduces costs.

従来の電圧7m1m発振器(Voltage Cont
rolledOcsillator )、すなわち、入
力制御゛亀圧■cによって周波数fo(=αVc)を発
振出力する電圧能]御発振器においては、中心発振周波
数fo % F’ M R調の周波数偏差に関して、 であるから、発振周波数をfoからfo十Δfにするた
めに、制?111]′に圧をVcから(1+If/fo
 )Vcにする必要がある。すなわち、従来のVOCに
おいては、・−中心発振周波数foを変えるためンζ人
力制御電圧Vcを変えた時、変調の深さd=jf/f。
Conventional voltage 7m1m oscillator (Voltage Cont
In the oscillator controlled by the oscillator, the center oscillation frequency fo % F' MR frequency deviation is as follows. In order to change the oscillation frequency from fo to fo+Δf? 111]' from Vc to (1+If/fo
) It is necessary to set it to Vc. That is, in the conventional VOC, when the human control voltage Vc is changed to change the center oscillation frequency fo, the modulation depth d=jf/f.

を一定にしようとすると、人力制何1f41.圧Vc′
f:(1+Δf/fo)倍にしなければならず、釆μ回
路を必要とし、そのため、回路構成が複離で、また、コ
ストも高かった。
If you try to keep it constant, what is the manual system?1f41. Pressure Vc'
f: had to be multiplied by (1+Δf/fo) and required a button μ circuit, resulting in a double-isolated circuit configuration and high cost.

本発明は、上述のごとき実情に鑑みてなされたもので、
特に、変調の深さd=Δf /f 、oを中心発振周波
IXfoと独立に制御し得るようにし、もって、乗算器
(又はLOG回路、Anti−LOG回路、力on器等
)を不要とし、回路構成の簡略化、及び、低廉化を図っ
たものである。
The present invention was made in view of the above-mentioned circumstances, and
In particular, the modulation depth d=Δf/f, o can be controlled independently of the center oscillation frequency IXfo, thereby eliminating the need for a multiplier (or LOG circuit, Anti-LOG circuit, power-on device, etc.), This is intended to simplify the circuit configuration and reduce the cost.

図は、本発明の一実施例を説明するための電気回路図で
、図中、1は第1の電流源、2は第2の電流W13はス
イッチ、4は第1のコンパレータ、5は第2のコンパレ
ータ、6はフリップフロップ回路で、今、フリップフロ
ップ回路6の出力信号がゞ゛1 ″とすると、スイッチ
3はa側に接続され、コンデンサCは、電流源1の電流
11  によって光′屯され、逆に、フリップフロップ
回路6の出力信号がゝ゛0″の時は、スイッチ3がb側
に接続され、コンデンサCの電荷は、電流源2の電流1
2  となって放電される。ここで、今、フリップフロ
ップ回路6の出力信号がゝゝ1″(又はゝゝ0″)とす
ると、コンデンサCの電位Voscは上昇(又は下降)
して行キ、Vaseがコンパレータ5の参照虫干Vuよ
りも菖くなると(又はコンパレータ4の診照′−圧Vl
よりも低くなると)、コンパレータ4(又は5)の出力
信号がゝ1″(又はゝ0″)となり、フリップフロップ
回路6をリセット(又はセント)し、該フリップフロッ
プ回路の出力信号をゝ0″(又はゝゝ1“)にする。な
お、上記において、Vu>Viである。
The figure is an electric circuit diagram for explaining one embodiment of the present invention. In the figure, 1 is a first current source, 2 is a second current W13 is a switch, 4 is a first comparator, and 5 is a first current source. Comparator 2 and 6 are flip-flop circuits. Now, if the output signal of the flip-flop circuit 6 is "1", the switch 3 is connected to the a side, and the capacitor C is turned on by the current 11 of the current source 1. Conversely, when the output signal of the flip-flop circuit 6 is "0", the switch 3 is connected to the b side, and the charge of the capacitor C is equal to the current 1 of the current source 2.
2 and is discharged. Now, if the output signal of the flip-flop circuit 6 is ``1'' (or ``0''), the potential Vosc of the capacitor C increases (or decreases).
Then, when Vase becomes higher than the reference Vu of the comparator 5 (or the diagnostic pressure Vl of the comparator 4
), the output signal of the comparator 4 (or 5) becomes ``1'' (or ``0''), which resets (or cents) the flip-flop circuit 6, causing the output signal of the flip-flop circuit to become ``0''. (or ゝゝ1“). Note that in the above, Vu>Vi.

次に、発振周波数すなわちフリップフロップ回路6の出
力1ぎ号について説明する。
Next, the oscillation frequency, that is, the output signal of the flip-flop circuit 6 will be explained.

まず、フリップフロップ回路6の出力1ぎ号が0“状態
からゝゝ1 //状態になり、次いでゝ゛0″状!ムに
なるまでの時間全t1 とすると、 its t1=C(Vu −Vl ) 1 で表わされる。
First, the output signal of the flip-flop circuit 6 changes from the 0" state to the "1 // state, and then the "0" state! Assuming that the total time t1 is required until the system becomes active, it is expressed as its t1=C(Vu −Vl) 1 .

同様に、フリップフロップ回路6の出力括−弓がゝゝ1
“状態からゝゝ0“の状態になり、次いで゛1″状態に
なるまでの時間を+2  とすると、i2*  +2 
=C(Vu−Vl) 2 で表わされる。
Similarly, the output circuit of the flip-flop circuit 6 is 1
If the time from the “state” to the “0” state and then to the “1” state is +2, then i2* +2
=C(Vu-Vl)2.

従って、フリップフロップ回路6の出力信号の周波数f
は、 となる。
Therefore, the frequency f of the output signal of the flip-flop circuit 6
becomes .

今、簡単のために、i = i、= 、+2  とする
と、となる。
Now, for simplicity, let i = i, = , +2.

第(5)式から明らかなように、周波数fFi電流iに
比し0しており(f=β1まただし、β=1/2C(V
u−Vl))、電流量を制御することによって周波数f
を制御することができる。
As is clear from equation (5), the frequency fFi is 0 compared to the current i (f=β1, but β=1/2C(V
u-Vl)), the frequency f by controlling the amount of current
can be controlled.

さて、発振周波数fを(1+d)fに変化させる1易合
を考えると、発振周波数f金、f=β11笈調の深さd
をd−Δf/f とすれば、(1+d)f二β((1+
a)il  ・ ((も)となる。従って、従来技術で
は、発振周波数賃・fから(1+d )fにするために
は、′屯浦、iを・(]十d)倍する必要がある。すな
わち、中心″’its 41i周波数fo二βtoを大
幅に変えて、かつ、変調の深さdを一定値に保つために
は、人力1tII11叶屯圧lに(1+d)全米する必
要があった。′/+元明にお・いでは、このdの制御に
Vu及び(又は) Vl>用い、f−β1=l(1+d
)βli   −Riとするものである。
Now, if we consider the simplest case of changing the oscillation frequency f to (1+d)f, the oscillation frequency f gold, f=β11 the depth of the tone d
If d-Δf/f, then (1+d)f2β((1+
a) il ・ ((also). Therefore, in the conventional technology, in order to change the oscillation frequency from f to (1+d)f, it is necessary to multiply ′tunura,i by ・(]10d) That is, in order to significantly change the center frequency fo2βto and keep the modulation depth d constant, it was necessary to apply (1+d) human power to .'/+In Yuanming, Vu and/or Vl> are used to control this d, and f-β1=l(1+d
) βli −Ri.

今、簡単のために、V=Vu = −Vl> IJとす
ると、 f’= −−18) CV となり、第(8)式より、 を得ることができる。
Now, for the sake of simplicity, if we set V=Vu=-Vl>IJ, then f'=--18) CV, and from equation (8), we can obtain.

ここで、 1dl(1とすれは、 であるから、前記(9)式は、 i (1+d)f寸□ ・・・ 01> 4cJ(x−d)Vl となる。Here, 1dl (1 and this are Therefore, the above formula (9) is i (1+d) f dimension □...01> 4cJ(x-d)Vl becomes.

従って、中心発振周波数fの値にかかわりなく、−走の
変調の深さd−Δf/fを侍ることができる。
Therefore, regardless of the value of the center oscillation frequency f, the modulation depth d-Δf/f of the -stroke can be met.

なお、以上に本発明の一実施例について説明し/Cが、
本発明は、上記実施例に限定されるものではなく、例え
ば、電流源1又は2の一方を単なる接地回路に簡略化す
ることも可能であり、また、コンパレータ4.5及びフ
リップフロラ7”回路6U、1個のコンパレータとモノ
マルチバイブレータよりなる回路構成に簡略化すること
も可能であり、史には、コンデンサCをアキュムレータ
レジスタ、電流源1及び2を定数発生器に置き換えるこ
とによってデジタル化することも可wヒである0以上の
説明から明らかなように、本発明によると、変調の深さ
d−Δf/foを任意の一定値としたま\、中心発振周
波数foを大幅に変えることのできる発振器を提供する
ことができる0
In addition, one embodiment of the present invention has been described above, and /C is
The present invention is not limited to the above-mentioned embodiment, for example, it is possible to simplify one of the current sources 1 or 2 to a simple grounding circuit, and it is also possible to simplify the current source 1 or 2 to a simple ground circuit. It is possible to simplify the circuit configuration to 6U, one comparator and a mono-multivibrator, and in the past, it has been digitized by replacing capacitor C with an accumulator resistor and current sources 1 and 2 with constant generators. As is clear from the above explanation, according to the present invention, the center oscillation frequency fo can be significantly changed while the modulation depth d - Δf/fo is set to an arbitrary constant value. 0 which can provide an oscillator capable of

【図面の簡単な説明】[Brief explanation of drawings]

図は、本発明の一実施例を説明するlこめの申気回路図
である。 1.2・・・′電流源、3・スイッチ、4、口・・コン
パレータ、6・・フリップフロップ回路。
The figure is a detailed circuit diagram illustrating an embodiment of the present invention. 1.2...' Current source, 3. Switch, 4. Comparator, 6. Flip-flop circuit.

Claims (1)

【特許請求の範囲】[Claims] ′−雌源と、コンデンサと、前記電流源とコンデンサと
の間を接続して前記コンデンサを充放電させるためのス
イッチと、前記コどデンサの電位を疹照イ位と比較する
ためのコンパレータと、該コンパレータの出力信号によ
ってtllJ 141されるフリップフロップ回路とを
有し、該フリップフロップ回蹟の出力信号によって前記
スイッチを切り換えてnil記コンデンサを充電又は放
電し、充電電圧が所″Jr’ lftに上昇した時に前
記フリップフロップ回路をリセット(又はセット)シ、
放電電圧が所定値に1ノ(下した時に前記フリップフロ
ップ回路をセット(又はリセット)するようにしたこと
を%轍とする発振器〇
- a female source, a capacitor, a switch for connecting between the current source and the capacitor to charge and discharge the capacitor, and a comparator for comparing the potential of the code capacitor with the output level. , and a flip-flop circuit that is tllJ 141 in response to the output signal of the comparator, and the switch is switched according to the output signal of the flip-flop circuit to charge or discharge the nil capacitor, and the charging voltage is set to a desired level. resetting (or setting) the flip-flop circuit when the voltage rises to
An oscillator whose % rut is to set (or reset) the flip-flop circuit when the discharge voltage drops to a predetermined value.
JP56171899A 1981-10-27 1981-10-27 Oscillator Pending JPS5873221A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56171899A JPS5873221A (en) 1981-10-27 1981-10-27 Oscillator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56171899A JPS5873221A (en) 1981-10-27 1981-10-27 Oscillator

Publications (1)

Publication Number Publication Date
JPS5873221A true JPS5873221A (en) 1983-05-02

Family

ID=15931868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56171899A Pending JPS5873221A (en) 1981-10-27 1981-10-27 Oscillator

Country Status (1)

Country Link
JP (1) JPS5873221A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61224514A (en) * 1985-03-28 1986-10-06 Sony Corp Astable multivibrator

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597727A (en) * 1979-01-19 1980-07-25 Matsushita Electric Ind Co Ltd Oscillation circuit
JPS5621412A (en) * 1979-07-31 1981-02-27 Hitachi Ltd Voltage frequency converting system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5597727A (en) * 1979-01-19 1980-07-25 Matsushita Electric Ind Co Ltd Oscillation circuit
JPS5621412A (en) * 1979-07-31 1981-02-27 Hitachi Ltd Voltage frequency converting system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61224514A (en) * 1985-03-28 1986-10-06 Sony Corp Astable multivibrator

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