JPS5880717A - Reference voltage circuit - Google Patents

Reference voltage circuit

Info

Publication number
JPS5880717A
JPS5880717A JP17929481A JP17929481A JPS5880717A JP S5880717 A JPS5880717 A JP S5880717A JP 17929481 A JP17929481 A JP 17929481A JP 17929481 A JP17929481 A JP 17929481A JP S5880717 A JPS5880717 A JP S5880717A
Authority
JP
Japan
Prior art keywords
transistor
reference voltage
terminal
voltage
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17929481A
Other languages
Japanese (ja)
Inventor
Masashi Shoji
庄司 正志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP17929481A priority Critical patent/JPS5880717A/en
Publication of JPS5880717A publication Critical patent/JPS5880717A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • G05F3/10Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

PURPOSE:To ensure the designing flexibility and to obtain the reference voltage of a low noise level, by varying the connection between the transistors and the resistances which are connected between a reference voltage output terminal and an earth terminal and then setting the reference voltage and the temperature coefficient independently of each other. CONSTITUTION:A reference voltage output 3 is connected to a power supply terminal 1 via a current supply circuit 2, and an end of each of resistances 4 and 7 is connected to the terminal 3. At the same time, the collectors of transistor (TR) 5, and TR10, TR11 are connected to the terminal 3. The other end of the resistance 4 is connected to the base of the TR5 as well as to an earth terminal 14 via the collector of a TR6. The emitter of the TR5 is connected to the terminal 14 via the resistances 15 and 12, and the joint of the resistances 15 and 12 is connected to the base of a TR8. The emitter of the TR8 is connected to the terminal 14 by a resistance 9. Then the other end of the resistance 7 is connected to the collectors of TRs 8 and 10 as well as to the base of the TR10. The emitter of the TR10 is connected to the terminal 14 by resistances 16 and 13, and the joint between the emitter of the TR10 and the terminal 14 is connected to the base of the TR11. Thus the reference voltage and the temperature coefficient are set independently of each other.

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は半導体集積回路に用いられる定電圧源として最
適な基準電圧回路に関するものである。 従来、半導体集積回路の基準電圧回路としてはツェナー
ダイオードによる定電圧回路とノぐンドギャプレギュレ
ータによる定電圧回路が一般に用いられている。前者は
ツェナーダイオードの降伏電圧を利用するもので、約5
V以上の基準電圧を得る場合に広く用いられている。し
かしこの場合、半導体集積回路の製造上のプルセスでツ
ェナーダイオードの降伏電圧が決定され、このため、約
5V以下の低電圧の降伏電圧をもつツェナーダイオード
を半導体集積回路に作シ込む場合には新たに付加的な製
造工程が必要となるためコストの上昇をまねく。しかも
、ツェナー電圧はその特性上ノイズ電圧が大きいことや
、あるいはツェナー電圧の温度係数が大きいなどの欠点
がある。 又、後者は電流智度の異なるトランジスタのベースφエ
ミッタ間電圧の温度係数が異なることを利用したもので
あって、その具体的的1路構成の−例を第1図に示して
説明する。 第1図において電源端子1は電流供給回路2を介L7て
基準電圧出力端子3・\結合さノ]てjO1基準電圧出
力端子3からは抵抗4および抵抗7のぞれぞれの一端と
、書らにトランジスタ5.10および11のコレクタへ
各々接続が外されている。 抵抗4の他端はトランジスタ5のベーストトランジスタ
6のコt/クタとの共通:接続点にむγ続されておシ、
トランジスタ5のエミッタJI・ランジヌタ6のベース
とトラフジ2夕8のベースは共通接続がなされ、共通接
続点は抵抗12を介
The present invention relates to a reference voltage circuit most suitable as a constant voltage source used in a semiconductor integrated circuit. Conventionally, as a reference voltage circuit for a semiconductor integrated circuit, a constant voltage circuit using a Zener diode and a constant voltage circuit using a no-gun gap regulator are generally used. The former uses the breakdown voltage of a Zener diode, which is approximately 5
It is widely used when obtaining a reference voltage of V or higher. However, in this case, the breakdown voltage of the Zener diode is determined during the process of manufacturing the semiconductor integrated circuit, and therefore, when fabricating a Zener diode with a low breakdown voltage of approximately 5 V or less into the semiconductor integrated circuit, a new Additional manufacturing steps are required, leading to an increase in costs. Furthermore, the Zener voltage has drawbacks such as a large noise voltage due to its characteristics and a large temperature coefficient of the Zener voltage. The latter method takes advantage of the fact that the temperature coefficients of the base-.phi.-emitter voltages of transistors with different current sensitivities are different, and a specific example of the one-path configuration will be explained with reference to FIG. In FIG. 1, the power supply terminal 1 is connected to the reference voltage output terminal 3 through the current supply circuit 2 via L7, and from the reference voltage output terminal 3 to one end of each of a resistor 4 and a resistor 7, The connections to the collectors of transistors 5, 10 and 11 are respectively removed. The other end of the resistor 4 is connected to the common connection point of the base transistor 6 of the transistor 5.
The emitter JI of the transistor 5, the base of the range nut 6, and the base of the trough 2 and 8 are commonly connected, and the common connection point is connected via a resistor 12.

【7て接地端子14に接続されてい
る。抵抗7の他端はトランジスタ8のコレクタへ接続さ
れ、さらにトランジスタ10のベースへ#続されている
。トランジスタ10のエミッタはトラフジ2夕1】のべ
−7−1接続されると共に抵抗13を介して接地端子1
4に接続されている。トランジスタ6および11のエミ
ッタは直接に、トランジスタ8のエミッタは抵抗9を介
して接地端子14へそれぞれ接続されている。ここで、
電流供給回路2は、例えば電流源あるいは電圧源と抵抗
とで構成される。又、この回路は半導体集積回路で作ら
れているため、上記各素子は同一の接合温度で動作して
おり、しかも各トランジスタ5.6.8.10および1
1の飽和電流の比は、それらの構造上に比例している。 さらにヌ、各抵抗4.7および9の抵抗値の相対比は正
確にとりうる。 第1図に示すバンドギャグレギーレータは上記のような
構成となっているため、基準電圧出力端子3の電圧VR
EFは(1)式のように表わされ、又各動作点の電圧、
電流に対して(2)〜(γ)が成立している。 vREF=■2xFL7+vBglO+vBE11  
−°°−(i)VBE6 = VBEa +L+ x1
%       +++ −(z)ただし VREF :基準電圧出力端子3の電圧VB” : )
 ランジスタロのベース・エミッタ間電圧 VBEa : トランジスタ8の    l■BE6:
トランジスタ5のベース・エミッタ間電圧 Vnglo;)ランジスタ10の   IVBEII 
: )ランジスタ11の   ll56  m )ラン
ジスタロの飽和電流■S8:)う〉′ジメタ8の  l ■s5 : トランジスタ5の  1 ISIO: )ランジスタ10の l 工sll:トランジスタ11の l  5− 11  m Fランジスタロに流れる電流■2 :トラ
ンジスタ8に  l 工3  : トランジスタ11に I n2 :抵抗4の抵抗値 R7:抵抗7の 〃 R9:抵抗9の 〃 R12:抵抗12のI R,3:抵抗13のI γ:電子の電荷 に:ボルツマン定数 T:絶対温度 ここで、トランジスタ8のベース・エミッタ間接合面積
をトランジスタ6のそれのN倍の面積で造られていると
すれは、 IS、=N @ IS6          ・・・・
・・(8)が成立する。(2)式へ〈8)、(4)およ
び(8)式を代入してとなる。 ここでvBg 6 とVBEIIおよびVBEaとVB
EIOはは 6− ほ等しくなるように動作点が選げわているので(9)式
は と表わされる。これを(1)式に代入するととなる。こ
れが、基準電圧出力端子3の電圧VREFを求める式で
ある。上記01)式を温度Tで偏微分しθVagto/
 a ’r−δVngt 17a T= a (!: 
> < ト次式これがVREFの温度係数を求める式で
ある。ここで−VBEl O,VBE 11の代表的な
値は、T=300’にで約0.65Vであシ、各々の温
度係数す乃わちαはおよそ−2mV/℃である。上記(
14式から判る様に右辺第2項が負となる庭め、右辺第
1項の抵抗比R7/ I’t 9とR7/ R4及びト
ランジスタ6とトランジスタ80面積比Nを適切に選べ
ば基準電圧出力端子3の電圧VREFの温度係数θVR
up/aTを零にすることができる。す々わち、上記(
]匂式の左辺を零とおいて次式が得られる。 この等式を満足する様に各定数を選んでやれば、温度変
動に対して安定なVREFを得ることができにΩ   
  kΩ る。具体的な例としてR4=1.2  、Ry=12 
 、Rs=300゜およびN=1と各パラメータを選定
すればこのときVnEp−2,5V         
    ・・・・・・0番)である。 ところが、この回路の最大の欠点は基準電圧出力端子3
 の電圧VREPがVBEl(h’VBE11 と%に
の温度係数によって一義的に決まってしまうことである
。ここで01)式と(12)式よシaVREF/aT=
 (VREp−Vat< l+)−VB E l 1 
)/P+ 2 a−=cmとなり、VRE’Fの温度係
数を苓とするVREFは上記谷パラメータの組み合せを
yえでも04−)式の電圧値となり、これからはずれた
VRgFeイbようとすると(15)式の温度係数を有
することとなる。 仮にVREF=3Vの電圧値を得ようとするとT−30
0°に付近(D V RE F (D (M k 係数
t)Vaep7aTは17mv/℃をもってしまう。 以上説明したように、従31−のバンドギャプ1/ギュ
レータによれば約2.5 Vで温度に対1.て安定表基
準電圧が得られるが、基準電圧VREFを変えると、温
度係数をもってしまうため、温度依存性のない安定な基
準電圧が広範囲に得られず、この事が股計上大きな制約
となる欠点があった。 本発明の目的は上述したような欠点をな(L、て、広範
囲にわたって安定した基準電圧を供給する半導体集積回
路に適した基準電圧回路を提IJ(することにある。 本発明の他の目的は、出力′電圧とその温度係数とを任
意に設定できる基準電圧回路を提供することにある。 本発明によれば、it詠端子と、その電源端子に電流源
を介して結合された出力端〕゛と、その出力端子と接地
端子間に接続された第1の抵わj、と定電−9− 圧素子との第1の直列回路ならびにこの第1の直列回路
に並列に接続された第2の抵抗と第1のトランジスタと
第3の抵抗との第2の泊列回路と、第2の抵抗と第1の
トランジスタとの接続点にベースが接続され、エミッタ
が直列接続された第4、第5の抵抗を介して接地端子に
接続された第2のトランジスタと、その第4、第5の抵
抗の接続点にベースが接続され、コレクタ・エミッタ電
流通路が電流源と接地端子との間に挿入された第3のト
ランジスタとを有することを特徴とする基準電圧回路を
える。 以下、本発明の実施例につき図面を8照して詐細に鰭1
明する。 第2図は本発明の一実施例を示す基準電圧回路の回路図
である。第2図において、第1図の従来例と同一のもの
社則−符号を用いており、異なる点はトランジスタ5の
エミッタを抵抗15の介してトランジスタ6.8のベー
スおよび抵抗12の一端の共通接続点に接続し、トラン
ジスタ10のエミッタは抵抗16を介してトランジスタ
11の10− ベースと抵抗13の一端との共通接続点に接続した点の
みで、他は1つたく同じである。 そして、この回路を半導体寒積回路で作った場合、第1
図の従来例と同様各系子は同一接合温度で動作し7てお
り、又、もトランジスタ5,6.8.10、および11
の飽和電流の比はそれらの構造上の面積に比例している
。さらに又、各抵抗4.7.9.12,13.15およ
び16の抵抗値の相対比も正確にとられている。 かかる基準電圧回路は上記のような構成と外っているた
め、基準電圧出力端子3の電圧VREFは、従来例と同
様にして請出して、次式のように表わされる。 ただし、R13は抵抗13の抵抗値、■t 16は抵抗
16の抵抗値で他は、第1図の場合と同様である。上記
Q6)式を温度Tで偏微亦し前述と同様dVBElo/
aT=aVBE//l17I′;αトオくトとなり、こ
れがVREFの温度係数を求める式である。 ここで基準電圧出力端子3の電圧VREFの温度係数が
苓となる出力電圧V’REFは、燵7)式の左辺を零と
おき、パラメータである4!r抵抗比R7/I(9,R
7/R4およびRq s/R1gとトランジスタ6とト
ランジスタ80面積比Nを と々る様に設定することにより、 となる電圧値を得られる。 この結果(ト)式を満足する様各パラメータを設定する
ことによシ、温度係数が零と々る基準電圧出力端子3の
電圧V k E F!、は抵抗比R16/Rs aを可
変とし任意の電圧値を得られることになる3具体的な例
として、VBEI (h VBE41の代表的な値は’
1’= 300 Kで約0.65 V 、各々の温度係
数はおよそ−27℃であシ、R4=1.2”R7=12
kn、R9= 250 ”、It13にΩ −5+R16==2k、およびN=1と選定すればこの
とき、 ’VRgp=3V              ・・・
・・・(財)となる。即ち、基準電圧出力端子3には、
温度係数が零で、出力電圧3Vの基準電圧が得られる。 さらにα6)式および(17)式よし次式が(1+られ
る。 上記(ト)式より、従来のものは基準電圧とその温度係
数は一義的に決まってし1つだものがこの実施例の場合
は抵抗比)(1i 6/Rlsをパラメータとして所望
の基準電圧VREFの#+Iと、温度係数を得ることが
できる。 なお、第2図の実施例において、抵抗15を仲人せず、
トランジスタ5のエミッタを直接トランジスタ6.8の
ペース共通接続点に接続しても同様の効果を得ることが
できる。また、基準電圧出力端子3の電圧VREFおよ
びその温度係数を求め13− る式が煩雑となるが、トランジスタ5、抵抗15.12
を用いずに、トランジスタ6のコレクタ・ベース間を直
接接続してダイオード接続とした場合も同様の効果を得
ることができる。 第3図は、第2図の実施例を用いて実演、シた出力電圧
3vの定電圧発生回路の回路図を示す。 第3図において、第2図の基準電圧回路に相当する部分
は同一符号を用いており、異なる点について説明する。 第3図において、抵抗17、トランジスタ18、ダイオ
ード19.20はtt源投入時のスタート回路を構成し
ており、出力端子3の出力電圧VREFが3■になれば
トランジスタ18はオフになり、定電圧発生回路として
の動作には寄与しなくなる。トランジスタ22,23.
26抵抗21,24.25は第2図の電流・供給回j1
82に相当する定電流源を構成しておシ、トランジスタ
23は出力端子3からバイアスが与えられている。トラ
ンジスタ27は電圧安定度を良好にする為に、負帰還を
かけられた電流増巾用トランジスタとして作用する。コ
ンデンサ28は発振防止用14− のコンデンサである。 今、この定電圧発生回路の出力電圧がハ「定の設定値よ
シ高くなると、この電圧は抵抗7を通してトランジスタ
10のベース電位をよりもち上げ、さらにトランジスタ
11のベース電位をよりもち上ける為、トランジスタ1
1のコレクタ電流は増大する。これによりトランジスタ
27のベース電流が減少して、出力端子3の電圧は低下
し、所定の値で定常状態となる。 以上説明したように、本発明によれば半導体集積回路化
に適した回路構成の基準電圧回路が得られ、基準電圧と
その温度係数を独立に設定できる利点があるため設計上
の自由度を大きくとれる。 又、ツェナーダイオードを用いないので低雑音の基準電
圧が得られる利点がある。 尚、本発明は上記実施例に限定されることなく例えば電
源端子1および接地端子14はある所定のバイアス電位
をもってもよく、適宜所定位置に回路の整合をとるため
に抵抗を挿入してもよい。 15−
[7] is connected to the ground terminal 14. The other end of the resistor 7 is connected to the collector of a transistor 8 and further to the base of a transistor 10. The emitter of the transistor 10 is connected to the ground terminal 1 through a resistor 13.
Connected to 4. The emitters of transistors 6 and 11 are directly connected to ground terminal 14, and the emitter of transistor 8 is connected to ground terminal 14 through resistor 9. here,
The current supply circuit 2 is composed of, for example, a current source or a voltage source and a resistor. Moreover, since this circuit is made of a semiconductor integrated circuit, each of the above elements operates at the same junction temperature, and each transistor 5, 6, 8, 10 and 1
The ratio of saturation currents of 1 is proportional to their structure. Furthermore, the relative ratio of the resistance values of each resistor 4.7 and 9 can be determined accurately. Since the band gag regulator shown in FIG. 1 has the above-mentioned configuration, the voltage VR at the reference voltage output terminal 3
EF is expressed as equation (1), and the voltage at each operating point,
(2) to (γ) hold true for the current. vREF=■2xFL7+vBglO+vBE11
−°°−(i) VBE6 = VBEa +L+ x1
% +++ −(z) However, VREF: Voltage VB of reference voltage output terminal 3: )
Base-emitter voltage VBEa of transistor: lBE6 of transistor 8:
Base-emitter voltage Vnglo of transistor 5 IVBEII of transistor 10
: ) 11 of transistor 11 56 m) Saturation current of transistor ■S8:) U〉' 1 of transistor 8 ■s5: 1 of transistor 5 ISIO: ) 1 of transistor 10 1 Sll: 1 of transistor 11 5-11 m F transistor Current flowing in ■2: I into transistor 8. I n2: Resistance value of resistor 4. R7: Resistor 7. R9: Resistance 9. R12: I R of resistor 12. 3: I of resistor 13. γ: Electron charge: Boltzmann's constant T: Absolute temperature Here, if the base-emitter junction area of transistor 8 is N times that of transistor 6, then IS, = N @ IS6・・・・・・
...(8) holds true. By substituting equations (8), (4), and (8) into equation (2), it is obtained. Here vBg 6 and VBEII and VBEa and VB
Since the operating points are selected so that EIO is approximately equal to 6-, equation (9) can be expressed as follows. Substituting this into equation (1) yields. This is the formula for determining the voltage VREF at the reference voltage output terminal 3. Partially differentiating the above equation 01) with respect to temperature T, θVagto/
a 'r-δVngt 17a T= a (!:
>< This is the formula for determining the temperature coefficient of VREF. Typical values for -VBEl O, VBE 11 here are about 0.65V at T=300', and the temperature coefficient of each, or α, is about -2mV/°C. the above(
As can be seen from Equation 14, the second term on the right side is negative, so if the resistance ratios R7/I't 9 and R7/R4 of the first term on the right side and the area ratio N of transistor 6 and transistor 80 are appropriately selected, the reference voltage can be obtained. Temperature coefficient θVR of voltage VREF of output terminal 3
up/aT can be made zero. All right, above (
] By setting the left side of the equation to zero, the following equation is obtained. If we choose each constant to satisfy this equation, we can obtain VREF that is stable against temperature fluctuations.
kΩ Ru. As a specific example, R4=1.2, Ry=12
, Rs=300° and N=1, then VnEp-2.5V
...No. 0). However, the biggest drawback of this circuit is that the reference voltage output terminal 3
The voltage VREP is uniquely determined by the temperature coefficient of VBE1 (h'VBE11 and %).Here, according to equations 01 and 12, aVREF/aT=
(VREp-Vat< l+)-VB E l 1
)/P+ 2 a-=cm, and VREF with the temperature coefficient of VRE'F as a value becomes the voltage value of the equation 04-) even if the combination of the above valley parameters is used.If we try to deviate from this, VRgFe becomes ( It has the temperature coefficient of equation 15). If you try to obtain a voltage value of VREF=3V, T-30
Near 0° (D V. 1. A stable reference voltage can be obtained using the table, but if the reference voltage VREF is changed, it will have a temperature coefficient, so a stable reference voltage without temperature dependence cannot be obtained over a wide range, and this is a major constraint in terms of calculation. The object of the present invention is to overcome the above-mentioned drawbacks and to provide a reference voltage circuit suitable for semiconductor integrated circuits that supplies a stable reference voltage over a wide range. Another object of the present invention is to provide a reference voltage circuit that can arbitrarily set the output voltage and its temperature coefficient.According to the present invention, a current source is connected to the IT terminal and its power supply terminal. a first series circuit consisting of a first resistor connected between the output terminal and the ground terminal, a constant current voltage element, and this first series circuit. a second string circuit including a second resistor, a first transistor, and a third resistor connected in parallel with each other; the base is connected to the connection point of the second resistor and the first transistor; A second transistor is connected to the ground terminal through fourth and fifth resistors connected in series, and the base is connected to the connection point of the fourth and fifth resistors, and a collector-emitter current path is formed. A reference voltage circuit characterized in that it has a third transistor inserted between a current source and a ground terminal.
I will clarify. FIG. 2 is a circuit diagram of a reference voltage circuit showing one embodiment of the present invention. In FIG. 2, the same company rules and symbols as in the conventional example shown in FIG. The emitter of transistor 10 is connected to a common connection point between the 10- base of transistor 11 and one end of resistor 13 through resistor 16, and the other points are the same. If this circuit is made with a semiconductor cold product circuit, the first
As in the conventional example shown in the figure, each device operates at the same junction temperature, and transistors 5, 6, 8, 10, and 11
The ratio of the saturation currents of is proportional to their structural area. Furthermore, the relative ratios of the resistance values of each resistor 4.7.9.12, 13.15 and 16 are also accurately taken. Since such a reference voltage circuit differs from the above-described configuration, the voltage VREF at the reference voltage output terminal 3 can be expressed as in the conventional example as shown in the following equation. However, R13 is the resistance value of the resistor 13, ■t16 is the resistance value of the resistor 16, and the rest is the same as in the case of FIG. By partializing the above equation Q6) with temperature T, dVBElo/
aT=aVBE//l17I';αtoot, which is the formula for determining the temperature coefficient of VREF. Here, the output voltage V'REF at which the temperature coefficient of the voltage VREF of the reference voltage output terminal 3 is equal to 0 is determined by setting the left side of the equation 7) to zero and using the parameter 4! r resistance ratio R7/I (9, R
By setting 7/R4 and Rq s/R1g and the area ratio N of the transistor 6 and the transistor 80 so as to be the same, the following voltage value can be obtained. As a result, by setting each parameter so as to satisfy equation (g), the voltage at the reference voltage output terminal 3 at which the temperature coefficient drops to zero, V k E F! , is the resistance ratio R16/Rs a that can be varied to obtain any voltage value.3 As a specific example, VBEI (h The typical value of VBE41 is '
1' = approximately 0.65 V at 300 K, each temperature coefficient is approximately -27°C, R4 = 1.2" R7 = 12
If kn, R9=250'', It13 is set to Ω-5+R16==2k, and N=1, then 'VRgp=3V...
...(goods). That is, at the reference voltage output terminal 3,
A reference voltage with a temperature coefficient of zero and an output voltage of 3V can be obtained. Further, α6) equation and equation (17) are combined with the following equation (1+). From the above equation (g), it can be seen that in the conventional system, the reference voltage and its temperature coefficient are uniquely determined. In this case, the desired reference voltage VREF #+I and the temperature coefficient can be obtained using the resistance ratio (1i 6/Rls) as a parameter. In the embodiment shown in FIG.
A similar effect can be obtained by connecting the emitter of transistor 5 directly to the common connection point of transistor 6.8. Also, although the formula for calculating the voltage VREF of the reference voltage output terminal 3 and its temperature coefficient is complicated, it is necessary to calculate the voltage VREF of the reference voltage output terminal 3 and its temperature coefficient.
A similar effect can be obtained when the collector and base of the transistor 6 are directly connected to form a diode connection without using the transistor 6. FIG. 3 shows a circuit diagram of a constant voltage generating circuit with an output voltage of 3 V, which was demonstrated using the embodiment shown in FIG. In FIG. 3, the same reference numerals are used for parts corresponding to the reference voltage circuit in FIG. 2, and different points will be explained. In FIG. 3, the resistor 17, transistor 18, and diode 19.20 constitute a start circuit when the tt power is turned on, and when the output voltage VREF of the output terminal 3 reaches 3■, the transistor 18 is turned off and the It no longer contributes to the operation as a voltage generating circuit. Transistors 22, 23.
26 resistors 21, 24.25 are the current/supply circuit j1 in Fig. 2
The transistor 23 constitutes a constant current source corresponding to the transistor 82, and a bias is applied to the transistor 23 from the output terminal 3. The transistor 27 functions as a current amplification transistor subjected to negative feedback in order to improve voltage stability. The capacitor 28 is a 14-capacitor for preventing oscillation. Now, when the output voltage of this constant voltage generation circuit becomes higher than the constant set value, this voltage passes through the resistor 7 and raises the base potential of the transistor 10, and further raises the base potential of the transistor 11. , transistor 1
1's collector current increases. As a result, the base current of the transistor 27 decreases, and the voltage at the output terminal 3 decreases to a steady state at a predetermined value. As explained above, according to the present invention, a reference voltage circuit with a circuit configuration suitable for semiconductor integrated circuits can be obtained, and the advantage of being able to set the reference voltage and its temperature coefficient independently increases the degree of freedom in design. It can be taken. Furthermore, since no Zener diode is used, there is an advantage that a low-noise reference voltage can be obtained. It should be noted that the present invention is not limited to the above embodiments, and for example, the power supply terminal 1 and the ground terminal 14 may have a certain predetermined bias potential, and a resistor may be inserted at an appropriate predetermined position for matching the circuit. . 15-

【図面の簡単な説明】 第1図は従来のバンドギップレギュレータの1例を示す
回路図、第2図は本発明の一実施例を示す基準電圧11
路図、第3図は本発明の基準電圧回路を基にした定電圧
発生回路図を示す。 ■・・・・・・電源端子、3・・・・・・出力端子、1
4・・・・・・接地端子、2・・・・・°定電流源、4
.7.9.12.13.15.16,17.21.24
.25°・パ・・抵抗、5.6.8.10,11.18
.22.23.26.27°=°)ランジスタ、19.
20・・・・・・ダイオ−)”、28・・・・・・コン
デンサ。 −16− ÷ 卒)1¥Il 隼2図    ′ →ヒ 串3図
[Brief Description of the Drawings] Fig. 1 is a circuit diagram showing an example of a conventional band gap regulator, and Fig. 2 is a reference voltage 11 showing an embodiment of the present invention.
FIG. 3 shows a constant voltage generation circuit diagram based on the reference voltage circuit of the present invention. ■・・・Power terminal, 3・・・Output terminal, 1
4...Ground terminal, 2...° constant current source, 4
.. 7.9.12.13.15.16, 17.21.24
.. 25°・Pa・・Resistance, 5.6.8.10, 11.18
.. 22.23.26.27°=°) transistor, 19.
20... Diode)", 28... Capacitor. -16- ÷ Graduation) 1\Il Hayabusa 2 figure ′ → Hi-kushi 3 figure

Claims (1)

【特許請求の範囲】[Claims] 第1の電圧端子と、該第1の電圧端子に第1の電流供給
手段を介して結合された出力端子と、該出力端子に第1
の抵抗と第2の電流供給手段との直列(ロ)路を介して
接続された第2の電圧端子と、前記第1の抵抗と前記第
2の電流供給手段との接続点にベースが接続された第1
のトランジスタと、直列接続され、一端が前記第1のト
ランジスタのエミフタに、他端が前記第2の電圧端子に
それぞれ接続された第2、第3の抵抗と、該第2、第3
の抵抗の接続点にベースが接続され、コレクタ・エミッ
タ間の電流通路が前記第1の電流供給手段と前記第2の
電圧端子との間に挿入された第2のトランジスタとを含
むことを特徴とする基準電圧回路。
a first voltage terminal; an output terminal coupled to the first voltage terminal via a first current supply means;
A base is connected to a second voltage terminal connected through a series (b) path between the resistor and the second current supply means, and a connection point between the first resistor and the second current supply means. The first
transistor, second and third resistors connected in series and having one end connected to the emifter of the first transistor and the other end connected to the second voltage terminal, respectively;
The base is connected to the connection point of the resistor, and the collector-emitter current path includes a second transistor inserted between the first current supply means and the second voltage terminal. Reference voltage circuit.
JP17929481A 1981-11-09 1981-11-09 Reference voltage circuit Pending JPS5880717A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17929481A JPS5880717A (en) 1981-11-09 1981-11-09 Reference voltage circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17929481A JPS5880717A (en) 1981-11-09 1981-11-09 Reference voltage circuit

Publications (1)

Publication Number Publication Date
JPS5880717A true JPS5880717A (en) 1983-05-14

Family

ID=16063304

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17929481A Pending JPS5880717A (en) 1981-11-09 1981-11-09 Reference voltage circuit

Country Status (1)

Country Link
JP (1) JPS5880717A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014203213A (en) * 2013-04-03 2014-10-27 トヨタ自動車株式会社 Band-gap reference circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014203213A (en) * 2013-04-03 2014-10-27 トヨタ自動車株式会社 Band-gap reference circuit

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