JPS5883397A - Control system for check on memory contents - Google Patents

Abstract

PURPOSE:To check on memory contents securely through simple constitution, by checking memories according check programs from other memories. CONSTITUTION:In ROMs 2, 3-, the control program of a microprocessor 1 is stored. According to the state of an FF14 after the power source is turned on, a check program 11 is read out of the ROM2 through a processor 1 and through the processing of the processor 1 following said program, contents of the ROMs 3, 4- are compared with check data in the ROM2 to decide on whether there is an error in the ROMs 3, 4- or not according to the coincidence or uncoincidence. Then, a similar check on the ROM2 is made by the check program 12 in the ROM 3 according to variation in the output of the FF14. Therefore, the check on memory contents is made securely by the constitution which eliminates the need for a parity bit memory and its peripheral circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a memory content check control system, particularly a memory IC.
The present invention relates to a memory content check control method that enables accurate and low-cost checking of memory contents in a circuit having two or more.

A conventional method for checking the contents of a memory is, for example, a method in which a memory for parity pits is provided and a parity check is performed for each address of the memory. FIG. 1 shows an example of the conventional method. In the figure, 1 is a microprocessor, 2 is a first
read-only memory (ROM), 3 is the second 1'
LOM, 4 is the third ROM, 5 is the nth ROM, 6 is the address node, 7 is the data bus, 8 is the valid 4RO
M, 9 represents a parity checker, and 10 represents a flip-flop. First ROM2, second ROM3,...
, n-th ROM 5 is each composed of a memory IC having a capacity of 2 bytes with 1 byte being 8 bits, and stores control programs for the microprocessor 1 and the like. Since there is no room to add a parity pit to each byte of these ROMs 2 to 5, one bit of parity ROM 8 is associated with each byte, and according to the contents of each byte of ROMs 2 to 5, Each bit value of the harness ROM is set in advance at the stage when the contents of the 5ROMs 2 to 5 are determined to have even parity or odd parity. The memory contents are checked by the parity checker 9, which takes in the 1-byte contents of the ROMs 2-5 and the corresponding 1-bit value of the parity ROM 8 for each address. If a parity error is detected, the 7 flip-flop 10 is set to 5 so that the parity check signal is turned on.

According to the above-described conventional method, a parity ROM for parity pits and its peripheral circuits are required, which inevitably increases costs and requires time and effort to write into the parity ROM.

As another conventional method, there is a method in which, for example, the contents of the memory are sequentially added, and the addition result is compared with a preset value. That is, a check program and check data are stored in advance in a part of the memory, and the check program sequentially reads and calculates data in the memory, and the results are compared with the check data to check the memory contents. It is a method.

However, this method has the disadvantage that it cannot correctly check if the contents of the check program are corrupted, and thus lacks accuracy.

It is an object of the present invention to solve the above-mentioned drawbacks and to provide a method for checking memory contents accurately and at low cost. Therefore, the memory content check control method of the present invention is implemented in a circuit including a microprocessor, instructions to be executed by the microprocessor, and a plurality of memories in which instructions are stored. A check program for checking the normality of the memory contents is stored in two or more of the above-mentioned memories, and each of the above-mentioned check programs is executed respectively, and the check program read from one memory is used to check the normality of the memory contents. The present invention is characterized in that the above-mentioned one memory is checked by a check program read from another memory, and the other above-mentioned memories are mutually checked.

This will be explained below with reference to the drawings.

FIG. 2 shows the configuration of one embodiment of the present invention, and FIG. 3 shows a time chart for explaining the operation of the embodiment shown in FIG.

In the figure, numerals 7 correspond to those in FIG. 1, 11 and 12 a check program for checking the memory contents, 13 an address decoder, 14 a flip-flop, 15 a selector, and 16 a check program. Represents the MP09 set signal line.

In FIG. 2, a first ROM, a second ROM3,...
The n-th ROM 5 K stores control programs for the microprocessor 1, and the microprocessor 1 fetches and executes these programs and performs control according to their contents. In particular, the first ROMz includes, for example, the second ROM5.
A check program 11 for checking the memory contents of the first to n-th ROMs 5 is stored, and a check program 12 for checking the memory contents of the first ROM 2 is stored in the second ROM 3.

Check program 11 and check program 12
Both have the same content as the conventional check program described above, and each consists of, for example, instructions for several tens of steps at a time. Therefore, if the memory IC is, for example, 2
Assuming that the program has a byte capacity, the check program occupies a small proportion of that capacity. Also, the first
The ROM 2 and the second ROM 3 each contain check data (not shown) for other memories together with the check program 11 or the check program 12.
is stored.

When the power is turned on to the circuit shown in FIG. 2, the microprocessor 1 enters a reset state (state T1 shown in FIG. 3), and then when the reset is completed and the state T2 shown in FIG. 1 specifies a specific address (vector address) and executes the program at the address specified by the vector address. This vector address is, for example, first flip 74 is aO'
At the same time, the selector 15 points to the check program 11 in the first ROM 2, and the check program 11 in the first ROM 2 is operated first.@The microprocessor 1 executes the check program 11. Possibly, the second ROMB to the nth ROM
The data of No. 5 is sequentially calculated, and the result of the calculation is compared with check data indicating a correct result calculated in advance and stored in the first ROM 2. As a result of the comparison, if they match, it means that the memory contents of the second ROM 3 to the n-th ROM 5 are correct. If the values do not match, it is determined that there is an error in the second ROM 3 to the n-th ROM 5, and the error is detected.

Once the execution of the above check program 11 is completed,
A reset circuit (not shown) operates to supply the MY-RESET signal, so that the state shown in FIG. 2 is established. Also, with this reset signal as a trigger, the clip 70 tube 14
The output is changed from "O" to "1" as shown in FIG. At the end of the reset F, the microprocessor 1 points to the vector address and enters the state shown in FIG. This time, the check program 12 in the ROM 5 of @2 is pointed to, and the check program 12 is activated.

Since the check program 12 is executed in the [- line, the first RO
The data of M2 is calculated sequentially, and the calculation result and the second RO
The check data in the MB is compared with the check data in the first ROM2.
The normality of the memory contents of the first ROM2 and the second ROM3 is checked.
The stored check programs themselves are also checked by other check programs.
It becomes possible to check the memory contents more accurately.

In the above embodiment of the present invention, the check program to be executed is switched by the reset signal, but since it is sufficient that two or more check programs are executed alternately, in the above case, For example, the following may be used. Instead of the second reset, a signal is input to the interlat terminal of the microprocessor, and the branch destination address is set to another memory IC. In this way, the check program in the memory IC is activated and the contents of the memory IC having the original vector address are checked.

In this way, the flip fabric 1 shown in FIG.
4 and selector 15 are not required, it becomes possible to check the memory contents with even simpler hardware.

As explained above, according to the present invention, a memory content check circuit can be realized at low cost without requiring a parity pit memory or its peripheral circuit, and even if the check program of one memory IC is corrupted. Even if the damaged memory IC cannot be checked correctly because it is corrupted, the broken memory IC can be checked by using a check program for other memory ICs, making it possible to correctly check the contents of all memories.

[Brief explanation of drawings]

FIG. 1 shows an example of a conventional system, FIG. 2 shows a configuration of an embodiment of the present invention, and FIG. 3 shows a time chart for explaining the operation of the embodiment shown in FIG. 1 is a microprocessor, and 2 to 5 are ROMs. 6 is an address bus, 7 is a data path, 8 is a parity ROM, 9 is a parity checker, 10 is a flip-flop, 11 and 12 are check programs, 13 is an address fist decoder, 14 is a flip-flop, 1
5 represents a selector, and 16 represents a reset signal line.

Claims (1)

[Claims] In a circuit having a microprocessor and a plurality of memories in which instructions fetched and executed by the microprocessor are stored, a check program that is executed by the microprocessor to check the normality of memory contents is provided. A check program that is stored and provided in two or more of the above-mentioned memories, executes each of the above-mentioned check programs, checks other memories according to the check program read from one memory, and is read from another memory. A memory content check control method characterized in that, while checking the one memory, the other memories are checked mutually.