JPS5884341A - Signal processing method - Google Patents

Abstract

PURPOSE:To reduce an effect of floating capacity due to an input switch of a multiplexer and to eliminate the interference between the input voltage quantities, by selecting the common potential of a sample holding circuit prior to the selection of the output of the sample holding circuit. CONSTITUTION:When a multiplexer MPX is switched to the input of an input channel CH2, the floating capacity C0 is cut off from the output of a sample holding circuit SH1 and then connected to the OV potential connected to the channel CH2. Then the electric charge which is charged to the capacity C0 is discharged, and the voltage of the capacity C0 is instantaneously set at OV. When the MPX is switched to the input of an input channel CH3, the OV of the channel CH2 is cut off. Then the output of a sample holding circuit SH2 is turned into an output V0 of the MPX. As a result, the electric charge stored to the capacity C0 never flows to the holding capacitors C1-Cn.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field The present invention is directed to a circuit that performs signal processing by inputting a plurality of input electrical quantities. relates to signal processing methods.

(b) Prior Art General K, as an input circuit for a device that digitally controls and protects an electric power system, signal processing is used to simultaneously sample the original amount of electricity in the system and then sequentially convert each input from analog to digital. circuit is used. The reason why the input voltage of the grid is performed at the same time is that the time relationship between the phase cape of the voltage-current part has a great significance in grid protection, and the analog-to-digital conversion is performed sequentially. This is because relatively expensive analog-to-digital converters are shared between each electrical input.

FIG. 1 shows the configuration of a conventional signal processing circuit of this type.

is a plurality of input electrical quantities input to the signal processing circuit from the outside, 8H1 to 8H, is this input electrical quantity E! ~E, is the input, sample and hold circuit samples and holds at fixed time intervals, CI ~ CII are each sample hole #
A hold capacitor attached to P circuits 8H1 to BH and storing an output voltage during hold is shown. In addition, wx is a multiplexer that inputs the output voltages of each of the sample hold circuits 8H and 8H11O, respectively, and selects one of them by an external control signal C8 and sequentially switches and outputs it.ADC is a multiplexer of this multiplexer MPX. This is an analog-to-digital converter that is provided at the output stage and converts an analog input amount into a digital amount Km.

In such a circuit, the input electrical quantities E1-E2 are sampled all at once at times j1 t t as shown in FIG. 2, and stored in the hold capacitors C1-C1. The held voltage is sent to Sansol hold circuits 8H1 to 8'
B, and applied to the input channel CH1% CI of the multi-solect t and MPx, respectively. Then, multiplexer 1 sequentially changes the hold voltage v by an external control signal (Y multi-reverse input switching control signal) C8.
1 to V, and outputs it to the analog-to-digital converter ADC. The analog-to-digital converter ADC performs analog-to-digital conversion every time the electric quantity is switched and outputs a digital quantity.

An example of conventional signal processing has been described above, but a major drawback of such a circuit is that there is interference between input electrical quantities. That is, when a voltage with a large amplitude is applied to an input, another input quantity of electricity adjacent to the input is affected, and a phenomenon occurs in which an error occurs in the result of analog-to-digital conversion. Hereinafter, the process by which this phenomenon occurs will be explained using FIG. 1 and @2.

Imaoka assumes that the sandal hold circuits 8H and 8K hold a relatively large voltage value of about 10V, and that the sample and hold circuit 8H holds a very small voltage value near Ov. Multiplext MPX
first selects the input channel CH, and applies the output voltage v1 of the sandal hold circuit 8H to the analog-to-digital converter DC. In FIG. 1, C. is a multiplexer MP! and the capacitance C, which represents the stray capacitance of the analog-to-digital converter ADC input, is charged to the output voltage of the multi-direction MPX, so in this case it is charged to a relatively large voltage of 10 Va degrees.
Next, when the multiplexer MPX switches the inputs CH and K, the stray capacitance C0 is disconnected from the output stage of the sample and hold gH1, and the sample and hold 81. connected to the output stage of the During this process, as shown in Figure 2, the sample and hold circuit 8H holds the low voltage near Ov.
, a charging voltage of 10 V of the stray capacitance C· is instantaneously applied to the output of . For this reason, an abnormal phenomenon occurs internally in some types of sample and hold modules, and the charge stored in this capacitor C flows into the hold key Jr/4 capacitor Cs of the sample and hold circuit 'BM'. A phenomenon occurs in which the hold voltage of the sample and hold circuit 8H10 becomes higher than the correct value. This phenomenon occurs when the potential difference between the voltage stored in CI and the hold voltage of the connected sandal hold circuit exceeds a certain threshold value, and the larger the capacitance value of stray capacitance C, or the stray capacitance C1 The higher the voltage stored in the hold voltage, the greater the error given to the hold voltage.

In the actual measurement results, the sample hold circuit 8H1
Effect Δ on the output voltage of the sandal hold circuit 8H when holding Ov at +10 V and 8M
vl reaches 100 mV or more.

Therefore, this value is the sample hold circuit 8H! If the absolute value of the amount of human effort is small, it can cause a large error cost, and companies that cause the above phenomenon must be suppressed by all means.

(C) Purpose of the Invention The present invention has been made to eliminate the drawbacks of the prior art as described above, and its purpose is to reduce the influence of stray capacitance associated with input switching of a multiplexer, and to reduce the input voltage. It is desirable to provide a signal processing method that can eliminate interference between quantities and perform error-free and accurate signal processing.

In order to achieve the above object, the present invention includes at least one sandal hold circuit that samples and holds an input electrical quantity, and a plurality of input electrical quantities that are applied directly and via the sample hold circuit, and In a signal processing circuit consisting of a multiplexer that sequentially switches and selects one of the outputs according to an external control signal and outputs the output, a KWIA that switches inputs in the multiplexer, and prior to selecting the output of a particular sample and hold circuit. This is characterized in that the common potential of the sandal hold circuits is selected.

伽）Composition The present invention will be described below with reference to embodiments shown in the drawings.

FIG. 3 shows an example of the configuration of a signal processing circuit according to the present invention, and in FIG. 3, elements with the same reference numerals as in FIG. 1 have the same functions as in FIG. 1 described above. Therefore, its explanation will be omitted. In the figure, the output ends of the sample and hold ml paths 8Ht to 8HT are connected to the multiplexer M
Connect PX input channels CHI to CM, K”.

In other words, the output end of the sample and hold circuit 8H is connected to the input channel CH1, and the Ov potential is connected to the input channel CH. Then, the output end of the Sundel hold circuit 8H is connected to the input channel CH3, and the output end of the Sundel hold circuit 8H is connected to the input channel CH4. The channel is configured so that the Ov potential is connected to the channel. Further, the output end of the multiplexer MPX is connected to an analog/digital converter ADC to convert an analog signal into a digital signal. Further, hold capacitors C1 to CH are connected to each of the sample and hold circuits 8Ht to 8HH in the same manner as in FIG. 1.

(f) Operation Next, use FIG. 3 and FIG. 4 to explain the operation of this circuit. As an example, as in FIG. 2, it is assumed that a large voltage value of approximately IOV is sampled and held in the sample and hold circuit 8H1, and a small voltage value around Ov is sampled and held in the sample and hold circuit 8H. The multiplexer MPX receives the multiplexer switching control signal C8.
Therefore, first, the human power channel CM1 is selected, and the output voltage v1 of the sandal hold circuit 8H is sent out as the multi-wavelength signal tMPXo output V. and,
At this time, the stray capacitance C is charged at the output voltage of the multiplexer MPX, so that it is charged at 10Vt.

Next, when the 1 multiplexer MPX is switched to the input channel CH, the stray capacitance C is separated from the output of the sandal hold circuit 8HtO, and the input channel CM
, will be connected to the Ov potential connected to . Therefore, at this point, the charge charged in the stray capacitance 00 is discharged, and the voltage of the stray capacitance co instantaneously changes from KIOV to Ov.

Then, the multiplexer MPX inputs the input channel C.
When switched to HI input, input channel CH, O
v is separated, and the output of the sample hold circuit 8H becomes the output vo of the multiplexer MPX. In this case, the output voltage of the sample and hold circuit 8H is KOV as described above.
Even if it is a small voltage close to K, the input channel CM,
Since the stray capacitance C is completely discharged during the period when is selected, the charge stored in the stray capacitance C flows into the hold canister C1 of the sandal hold circuit 8H, as in the conventional example. Instead, the accurate hold voltage vI of the Sansol hold circuit 8H is output as is as the output V of the multiplexer MPX.

Similarly, when the manual channel CH4 is selected, the stray capacitance C charged by the output voltage of the sample-and-hold circuit 8H is discharged, so when the next input channel CH is selected, this floating capacitance C. Capacity C・
The effect of this will disappear, and an accurate hold value will be output.

In this way, a channel to which the Ov potential is connected is provided between the channels to which the sandal hold circuits 8H1 to SHi are connected, and the common potential o of the sample and hold circuits is set before switching and selecting the output of the sandal hold circuits.
K is set so that v can be selected.

Therefore, as mentioned above, the stray capacitance C charged to a high voltage, which is the cause of interference between input quantities existing in conventional signal processing circuits, is caused by the adjacent - When connected to a channel, it is possible to reduce the voltage charged in the stray capacitance C@ to near OV before connecting it to the adjacent channel, and then connect it to the adjacent channel, so the multiplexer MPX
It reduces the influence of stray capacitance C due to input switching of
By eliminating interference between signals, it is possible to perform error-free, extremely high-precision, high-performance, and accurate signal processing.

(g) Other embodiments It should be noted that the present invention is not limited to the above example.

(1) In the above embodiment, the input of the multiplexer MPX is connected to the Ov potential for every other channel, but as shown in FIG. You may also provide a channel connected to. That is, in Figure 5, for example, the output voltage v1 of the sample hold circuit 8H does not become such a large voltage, or the output voltage v1 of the sample hold circuit SH,
The output voltage v3 of is always a large voltage value, and the stray capacitance C
If the influence of . . . is not a problem, the Ov channel may not be provided, and the Ov channel may be provided only for channels that are easily affected, for example, between the sample and hold circuits 8H and SR in the figure.

(2) FIG. 6 shows an embodiment in which a small resistance rVt may be inserted between the channel of the multiplexer MPX to be connected to the Ov potential and the Ov potential.

That is, in the above explanation, the input channel of the multiplexer MPX is connected to the Ov potential, and the stray capacitance C is discharged instantaneously when that input channel is selected. However, even if the discharge time is a little longer, the signal If it does not affect the processing, it is also possible to configure the discharge through a small resistance r as shown in Figure @6. In this case, the stray capacitance C. will be discharged with a time constant C@r.

(3) In the above explanation, the signal section I1 circuit is provided with the same number of sample and hold circuits as the types of input electrical quantities. For example, in the case shown in Fig. 7, only one of the input electric quantities is sampled by the sample-hold circuit sat K, and the other input electric quantities are directly sampled by the multiplexer M.
It is configured to input PXK. As described above, the error in the input voltage due to the stray capacitance C@ occurs only when the stray capacitance C. is connected to the output of the sample-and-hold circuit. Therefore, it is sufficient to connect only the input channel C immediately before the input channel CH to which the output end of the sample hold circuit 8H1 is connected to the Ov potential. If this is done, the multiplexer MPX will be connected to the input channel CH! Since the stray capacitance C is discharged during the period in which CH is selected, the adverse effects of the stray capacitance C as described above will disappear even when the input channel CH is selected next.

(4) In the above explanation, when one multiplexer MPX selects one sample and hold circuit, the previous input channel of that one is connected to the Ov potential, and these
The method was to select NK, but the method is not limited to this, as shown in Figure 8, only a certain input channel CH- of the multiplexer MPX is connected for about OVg Km, and the selection is transferred to other sample hold circuits. It is also possible to select this specific input channel chH beforehand.

The multiplexer switching signal CB in such a case is shown at @9-. That is, first, the multiplexer MPX selects the input channel CH1iC@connected sample hold 8H1.
Select. Next, by selecting the input channel CH, the charge stored in the stray capacitance Co is discharged. After that, select the output of the sample hold SH, which is connected to the input channel CHmKi, and then select the single channel CH before selecting the other sandal hold circuit 8H in the same manner! By applying the multiplexer switching signal CS, exactly the same effect as described above can be obtained, and the input channels of the multiplexer MPX can be used effectively. It goes without saying that the number of input channels connected to the OV potential is not limited to one, but may be provided in a convenient number and position depending on the circuit configuration or the multiplexer switching control signal CS.

6) As described in detail, the tLK of the present invention reduces the influence of stray capacitance that occurs when selecting the output of a sandal hold circuit using a multiplexer, eliminates interference between input electric quantities, and achieves high precision. A signal processing method that facilitates accurate signal processing without high performance errors can be provided.

[Brief explanation of the drawing]

Figure 1 is a diagram showing the configuration of conventional signal processing @ money, Figure 2 is a waveform diagram to explain the operation in Figure 1, Figure 3 is a configuration diagram showing an embodiment of the present invention, and Figure 4 The figure is a waveform diagram for explaining the operation in Figure 3, Figures 5 to 8 are block diagrams showing other embodiments of the present invention, and Figure 9 is a diagram for explaining the operation in Figure 8. It is. 8H1~SH,... Sandal hold circuit, C1~C
1...Hold capacitor, MPX...Multiplexer, ADC...Analog-to-digital converter, c. ...Stray capacitance, r...Small resistance, 8/..., Sansolhode signal, CB...Multiplexer switching control signal WN2 Fig. tl Fig. 5 Fig. 6 Fig. 7

Claims (1)

[Claims] At least one sample and hold circuit that samples and holds an input amount of electricity, and a plurality of input amounts of electricity that are applied directly and through the sample and hold circuit as inputs, and that is sampled according to an external control signal. When switching inputs in the multiplexer, prior to selection of the output of a particular sample and hold circuit, the sample hall rgul
o A signal processing method characterized in that the signal processing is carried out by selecting a common potential.