JPS5886711A - Malfunction detection method - Google Patents
Malfunction detection methodInfo
- Publication number
- JPS5886711A JPS5886711A JP18574081A JP18574081A JPS5886711A JP S5886711 A JPS5886711 A JP S5886711A JP 18574081 A JP18574081 A JP 18574081A JP 18574081 A JP18574081 A JP 18574081A JP S5886711 A JPS5886711 A JP S5886711A
- Authority
- JP
- Japan
- Prior art keywords
- solenoid
- time
- drive circuit
- output
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F7/00—Magnets
- H01F7/06—Electromagnets; Actuators including electromagnets
- H01F7/08—Electromagnets; Actuators including electromagnets with armatures
- H01F7/18—Circuit arrangements for obtaining desired operating characteristics, e.g. for slow operation, for sequential energisation of windings, for high-speed energisation of windings
- H01F7/1844—Monitoring or fail-safe circuits
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Accessory Devices And Overall Control Thereof (AREA)
- Impact Printers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
本発明はブリ／ター等に用いられるソレノイド駆動回路
が正常に動作したか、否かを、検出する為の誤動作方式
に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a malfunction method for detecting whether or not a solenoid drive circuit used in a burr/tar etc. is operating normally.
従来、多数のソレノイドを有する装置、例えばプリンタ
等のソレノイド駆動回路が正常に動作したか、否かを判
別する為に、駆動回路の出力トランジスタのＯＮ 、
ＯＦＦを論理的に検出する方法があったｏしかしこの従
来方式によっては、駆動回路までの動作は確認できるが
、実際にソレノイドに電流が流れたか、否か、までの判
断は出来なかった。Conventionally, in order to determine whether or not a solenoid drive circuit of a device having a large number of solenoids, such as a printer, is operating normally, it is necessary to turn on the output transistor of the drive circuit.
There was a method to logically detect OFF.However, with this conventional method, although it was possible to check the operation of the drive circuit, it was not possible to determine whether or not current actually flowed through the solenoid.
本発明は、係る点に鑑みて成されたものであり、駆動回
路、ソレノイドコイル、電源等の構成要素のいずれが原
因であっても誤動作を検出する事の出来る、極めて有効
な方式を提供出来るものである。The present invention has been made in view of the above points, and can provide an extremely effective method that can detect malfunctions caused by any component such as the drive circuit, solenoid coil, or power supply. It is something.
以下一実施例に基すき本発明の詳細な説明するＯ
第１図は、本発明に係るソレノイド駆動装置のブロック
図であり
ＣＰＵは制御装置であって、ソレノイドの駆動タイミン
グ信号を発生させ、又、誤動作検出の一部をも兼ねてお
り、誤りを検出するとエラーランプＢを点灯させる。The present invention will be described in detail based on one embodiment below. Figure 1 is a block diagram of a solenoid drive device according to the present invention, and the CPU is a control device that generates a drive timing signal for the solenoid. , also serves as a part of malfunction detection, and lights up error lamp B when an error is detected.
ＯＭＰはコンパレータであり一人力ｖ８と十入力孔を比
較しｖ８よりＶ。が高いとき、出力Ｔを１にする０８Ｑ
Ｌは多数のソレノイドとその駆動回路等の総称であり、
制御装置ＯＰＵの出力Ｒ１〜Ｒ４によって目的のソレノ
イドを駆動すべく構成されており、その詳細を第２図に
よって説明する。OMP is a comparator and compares the single power v8 and the ten input hole, and it is more V than v8. 08Q which sets output T to 1 when is high
L is a general term for a large number of solenoids and their drive circuits, etc.
It is configured to drive a target solenoid by outputs R1 to R4 of the control device OPU, and its details will be explained with reference to FIG.
Ｌ、〜Ｌ４は４コのソレノイドコイルであり、各ソレノ
イドコイルの駆動回路側には各々、ダイオードＤ、〜Ｄ
４がつながり各ダイオードの一方は、共通出力線Ｖ０に
つながる。L and ~L4 are four solenoid coils, and diodes D and ~D are respectively connected to the drive circuit side of each solenoid coil.
4 are connected, and one of each diode is connected to the common output line V0.
これ等のダイオードはソレノイドコイル駆動トランジス
タＱ、−Ｑ、がＯＮからＯＦＦに変化した時、ソレノイ
ドに蓄えられたエネルギーを放出させる為に用いるもの
であり、従来はダイオードのコモン側の線■。はソレノ
イドの電源ｖ８ｏＬに直接つなげるものであるが、本発
明に於いては、ソレノイドの磁気エネルギーを単純に電
源に戻すのではなく、このエネルギーを一度コモン線ｖ
ｏと電源ｖ８０Ｌ間に入れたコンデンサＯＴに蓄えた後
抵抗ＲＴを通して電源焉。１に流す様に構成した。尚、
駆動トランジスタＱ１〜Ｑ４のペースにはそれぞれベー
ス抵抗ＲＢと入力抵抗ＲＩが接続され１人力抵抗−には
それぞれ前記制御回路ＣＰＵの出力信号、Ｒ１−Ｒ４が
つながっている。These diodes are used to release the energy stored in the solenoid when the solenoid coil drive transistors Q and -Q change from ON to OFF, and conventionally, the common side line of the diode is connected to the line ■. is connected directly to the solenoid's power supply v8oL, but in the present invention, instead of simply returning the magnetic energy of the solenoid to the power supply, this energy is once connected to the common line v8oL.
After storing it in the capacitor OT inserted between o and the power supply v80L, the power supply is terminated through the resistor RT. It was configured to flow in 1. still,
A base resistor RB and an input resistor RI are connected to the paces of the driving transistors Q1 to Q4, respectively, and the output signals R1 to R4 of the control circuit CPU are connected to each of the resistors.
以上の如く構成した一実施例の動作について第３図のタ
イミングチャートに従って説明する〇崗タイミング泌ヤ
ードは制御装置がＬ２を駆動した後、つづいてり、とり
、を同時に駆動する場合についてのものである。The operation of the embodiment configured as described above will be explained according to the timing chart shown in FIG. be.
まず制御回路はソレノイドＩｊ２を駆動する為に出力Ｒ
１をｌにすると、駆動回路のトランジスタＱ、がＯＮＩ
、てソレノイドＬ、に電流を流す、次に所望の時間径制
御回路ＣＰＵが鴫出カ信号１゜にする。するとソレノイ
ド駆動回路のトランジスタＱ、がＯＦＦになる。この後
、駆動トランジスタＱ、がＯＮの時に蓄えられた磁気エ
ネルギーｑ工。First, the control circuit outputs R to drive solenoid Ij2.
When 1 is set to l, the transistor Q of the drive circuit becomes ONI.
, a current flows through the solenoid L, and then the desired time diameter control circuit CPU sets the output signal to 1°. Then, the transistor Q of the solenoid drive circuit is turned off. After this, the magnetic energy q is stored when the drive transistor Q is turned on.
は、電流となつ−ＣダイオードＤ、を通りコンデンサ叫
に流れ込み、コンデンサｃＴの両端には電圧Ｖを発生す
る。この時の電圧Ｖはコンデンサｑの容量をＣ２流れ込
んだ電荷量をｑ。とすｎばυ＝ｑｏ１０であり、共通線
Ｖ。には、ｖ８ｏ、１．＋υノ電圧が表われる。即ち、
第３図Ｖ。の波形のようになる。その後コンデンサＣ１
に蓄えられた電荷Ｑａは、抵抗ＲＴを通り電荷量ｑ。に
よって決まる時間をかけて電源ｖ８゜１に放出される。becomes a current and flows into the capacitor through the diode D, generating a voltage V across the capacitor cT. The voltage V at this time is the amount of charge flowing into C2 through the capacitance of capacitor q. and n=qo10, and the common line V. includes v8o, 1. +υ voltage appears. That is,
Figure 3 V. The waveform will look like this. Then capacitor C1
The charge Qa stored in passes through the resistor RT and becomes the charge amount q. It is discharged to the power supply v8°1 over a period of time determined by .
一方共通線Ｖ。は第１図に示した様に電圧比較器ＯＭＰ
の＋側入力に接続されており、又−個入力には基準電圧
としてｖ８が加えられている。この基準電圧はソレノイ
ドの電源電圧ｖ８ｏＩ、より少し高めに設定されている
。On the other hand, common line V. is the voltage comparator OMP as shown in Figure 1.
It is connected to the + side input of , and v8 is applied as a reference voltage to the - input. This reference voltage is set slightly higher than the solenoid power supply voltage v8oI.
即ち、第３図に示した如く共通線Ｖ。が基準電圧ＶＢを
上まわった時、比較器ＯＭＦの出力Ｔが１となる。この
出力Ｔが１になっている時間は、前記したコンデンサＯ
ＴＫ蓄えられた電荷量ｑ。によって決まる時間、【、で
ある０又、比較器の出力Ｔは、制御装置ＯＰＵに入力さ
れる。制御装置ＯＰ［Ｊはこの信号Ｔが１になっている
時間を計る。That is, the common line V as shown in FIG. When the voltage exceeds the reference voltage VB, the output T of the comparator OMF becomes 1. The time during which this output T is 1 is the time when the above-mentioned capacitor O
TK The amount of charge stored q. The output T of the comparator is input to the control unit OPU. The control device OP[J measures the time during which this signal T is 1.
そして、その時間が予め設定された時間と違わないかを
判別するものである。予め設定されたの式によって決ま
る時間である。崗、式中のｎは、何個のソレノイドを駆
動したかの数である。Then, it is determined whether the time is different from a preset time. The time is determined by a preset formula. n in the formula is the number of solenoids driven.
今制御回路はソレノイドコイル個を駆動【７たのでｎ＝
１である。又判別の結果、時間が一致しなければ、例え
ば、比較器の出力Ｔが１の時間が零であればソレノイド
や配線に断線があった、又は駆動回路がこわれていた等
、何等かの理由でソレノイドに電流が流れなかった事に
なる。Now the control circuit drives solenoid coils [7, so n=
It is 1. If the times do not match as a result of the determination, for example, if the time when the output T of the comparator is 1 is 0, there may be some reason such as a break in the solenoid or wiring, or a broken drive circuit. This means that no current flows through the solenoid.
又、比較器の出力Ｔが１の時間が長すぎた場合は配線の
ショート等、何等かの理由で２つ以上のソレノイドがＯ
Ｎ ｌ、てしまった事がわかる。Also, if the comparator output T is 1 for too long, two or more solenoids may be turned off due to some reason such as a short circuit in the wiring.
N l, I know what happened.
この様な時制御回路ＣＰＵは、う／プＥを点灯させ誤動
作を知らせる。In such a case, the control circuit CPU lights up the U/P E to notify the malfunction.
さて、制御装置はつづいてソレノイドＬ３． Ｉ’１を
同時にＯＮさせる為、出力Ｒ，，Ｒ，にｌを出力する。Now, the control device continues with solenoid L3. In order to turn on I'1 at the same time, l is output to outputs R,,R,.
これによって駆動回路のトランジスタＱ、。This causes the transistor Q of the drive circuit.
Ｑ４がＯＮとなりソレノイドＬ３ｔ Ｌ４に電流を流す
。Q4 turns ON and current flows through solenoids L3t and L4.
制御装置ＣＰＵは再び一定時間経過後、出力”！＋Ｒ４
を０にする。従って、駆動トランジスタＱｓｔＱ４がＯ
ＦＦとなり、ソレノイドに蓄えられた磁気エネルギーｑ
ＩＪは、それぞれダイオードＤ８．及びＤ４を通りコ／
デンナＣＴに蓄えられる。この時コンデンサＣＴの両端
には、前記ソレノイドＬ、を駆動した時と同様に電圧ν
が表われるが、今度はソレノイドＬ、 、 Ｌ、の２つ
を同時にＯＮさせていたので、 ｕ ＝ ２ Ｘ ｑ
ｃ ／ Ｏとなる。つづいてこの電荷２ Ｘ ｑ、は抵
抗臀を通して、電荷量２Ｘｑｃに基ずく時間で放出され
第３図のＶ。の如き電圧変化を示し、その電圧に基すき
比較器ＯＭＰの出力Ｔは”１′′を出力する。制御回路
ＣＰＵは、こ・のＴが”１″の時間を計り、前記時間の
式ｔと比鰐し、違っていないかを判定する。The control device CPU outputs “!+R4” again after a certain period of time has elapsed.
Set to 0. Therefore, drive transistor QstQ4 is O
becomes FF, and the magnetic energy q stored in the solenoid
IJ are diodes D8. and through D4/
Stored in denna CT. At this time, a voltage ν is applied across the capacitor CT in the same way as when driving the solenoid L.
appears, but this time two solenoids L, , and L were turned on at the same time, so u = 2 X q
c/O. Subsequently, this charge 2Xq, is discharged through the resistor in a time based on the amount of charge 2Xqc, and becomes V in FIG. Based on the voltage, the output T of the plow comparator OMP outputs "1".The control circuit CPU measures the time when this T is "1", and calculates the time expression t. Compare the two and determine if there is a difference.
以上、説明した様に本発明は、駆動回路のみならず、駆
動回路以降の配線やソレノイドそのものに不具合があっ
ても、それを検出する事が出来るＥｌその構成が極めて
シンプルであり安価に出来るため、極めて有効な検出方
式を提供し得るものである。As explained above, the present invention is capable of detecting defects not only in the drive circuit but also in the wiring after the drive circuit or the solenoid itself.The structure of the element is extremely simple and can be made at low cost. , which can provide an extremely effective detection method.
第１図は本発明の一実施例を示すブロック図であり、Ｏ
ＰＵ ・・・制御装置、ＯＭＰ・・電圧比較器。
ＳＱＬ・・・ソレノイド、及び駆動回路、図
第２図はソレノイド、駆動回へ、第３図は、各部の波形
及びタイミングを示すタイミングチャート図である。
出Ｍ 人 キャノン株式会社
Ｃ」社−−１
ｖ、ｏｔFIG. 1 is a block diagram showing one embodiment of the present invention.
PU: Control unit, OMP: Voltage comparator. SQL... Solenoid and drive circuit, Figure 2 shows the solenoid and drive circuit, and Figure 3 is a timing chart showing the waveforms and timing of each part. Person from Canon Co., Ltd. C”--1 v, ot
Claims (1)
を検出し、基準電圧と比較することによりソレノイドの
誤動作を検出することを特徴とする誤動作検出方式。A malfunction detection method characterized in that a resistor is connected to the capacitor, a voltage generated across the capacitor is detected, and a malfunction of a solenoid is detected by comparing it with a reference voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18574081A JPS5886711A (en) | 1981-11-19 | 1981-11-19 | Malfunction detection method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18574081A JPS5886711A (en) | 1981-11-19 | 1981-11-19 | Malfunction detection method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5886711A true JPS5886711A (en) | 1983-05-24 |
Family
ID=16176025
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18574081A Pending JPS5886711A (en) | 1981-11-19 | 1981-11-19 | Malfunction detection method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5886711A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62290111A (en) * | 1986-06-09 | 1987-12-17 | Mitsubishi Electric Corp | Fault detection circuit for inductive-load drive circuit |
| JPH05152127A (en) * | 1991-11-29 | 1993-06-18 | Yamaha Corp | Solenoid abnormality detection circuit |
-
1981
- 1981-11-19 JP JP18574081A patent/JPS5886711A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62290111A (en) * | 1986-06-09 | 1987-12-17 | Mitsubishi Electric Corp | Fault detection circuit for inductive-load drive circuit |
| JPH05152127A (en) * | 1991-11-29 | 1993-06-18 | Yamaha Corp | Solenoid abnormality detection circuit |
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