JPS5889870A - Nonvolatile variable resistance element - Google Patents

Abstract

PURPOSE:To obtain a new element wherein a resistance value having an arbitrary accuracy can be set and the resistance value can be preserved even though a power source for an IC is cut off, by taking out at least two terminals to the outside. CONSTITUTION:In the drawing G, D, S, and B are a gate, a drain, a source, and a substrate, respectively, 1 is an oxide film, and 2 is a nitride film. In this constitution, when the substrate is grounded and a positive potential having a sufficient value is given, electrons are injected into a gate film from the substrate, and a Vth of this MNOS transistor is shifted to the positive side. Conversely, when a negative potential having sufficient value is given to the gate G, the electrons, which have been previously injected, are discharged to the substrate, and the Vth is shifted to the negative side. When the resistance value is to be changed, G'' and S'' are selected by SW1 and SW2, and an appropriate potential difference is given to said G'' and S''. Then the arbitrary Vth value is set, and the characteristics as the resistance body can be changed.

Description

[Detailed Description of the Invention] The present invention is an electronic method that allows you to set the resistance value to an arbitrary value, and once it is set, the resistance value is saved until it is reset. This invention relates to a replaceable non-returnable resistance element.

In conventional IC/C, when a resistor element is built in, its resistance value is determined by the design and process on the mask, and once the IC is manufactured, the resistance value cannot be changed.
When it was necessary to adjust the resistance value, a large number of resistors were built in advance at the same time, terminals were taken out to the outside, and the resistors were combined in series or parallel in various ways to obtain the desired resistance value. As a result, ICs that require high resistance accuracy require a large number of external control terminals, and in order to avoid this complexity, it is sometimes necessary to use external resistors from the beginning.

The present invention eliminates such drawbacks and provides a new element that allows a resistance value to be set with arbitrary accuracy by connecting at least two terminals to the outside, and that retains the resistance value even when the IC power is turned off. That is.

The details will be described below with reference to the drawings.

The resistance element of the present invention uses the non-linear current-voltage characteristics of an MIS transistor. Figure 1 shows a typical wiring connection method. Note that although an N-channel type will be described below for convenience, the same holds true for a P-channel type. Figure 1 (a).

(b) shows the case where vth is positive, that is, the case of enhancement type, and FIG. 1(c) shows the case where vth is negative, that is, the case of depression type. These current-voltage characteristics are nonlinear as shown in the figure, and it is already known that they are used inside an IC as a resistance element.

FIG. 2 schematically shows the structure of a nonvolatile memory that can be electrically rewritten with an MNO8 structure. In the case of the MNOS structure, there are differences in the height of the barrier between electrons and holes, and a P-channel type is generally used, so this diagram will intentionally explain the P-channel structure. In principle, there is no structural difference between the N-channel type and the N-channel type.

In FIG. 2, G, D, S, and B are the gate, drain, source, and substrate, respectively, 1 is a very thin oxide film, and 2 is a nitride film. In this structure, for example, if the substrate is grounded and a sufficient positive potential is applied to the gate, electrons will be injected from the substrate into the gate film (very thin oxide film 1 and nitride film 2), and the vth of this MNOS transistor will be Shift to the positive side.

Conversely, when a sufficient negative potential is applied to the gate G, the previously injected electrons are emitted to the substrate side again, causing vth
shifts to the negative side. These phenomena are already known. In this case, the drain and source potentials were essentially not a problem. Here, we conducted an experiment to see what happens when we change the potentials of the drain and source, and the results are summarized as follows.

(1) When the gate is set to a sufficiently positive potential with respect to the substrate, there is essentially no effect as long as the drain and source are both between the substrate potential and the gate potential.

(When setting the gate to a negative potential of +1 with respect to the substrate, the -drain and source potentials have a large influence. As you can see in Figure 2, the drain and source are paired wires and are exchanged. This is possible, so if one of them, for example, the drain, is opened and the potential of the source is changed, the same th shift will occur if the potential difference between the gate and the source is the same.

The situation is schematically shown in Figure 13.

Fig. 3 is easy to understand if we consider, for example, that the source potential is grounded. At this time, since Qcs is the gate potential (with respect to the substrate), vth does not change at all up to a certain value (a), and when -vGS is applied further, vth becomes exponentially related (region b). (to negative in this case, @<). In other words, at first, Nakama doesn't care about vth, but gradually -vGS
As t continues, vth changes rapidly, but eventually reaches the region (c) where it reaches a saturation value. In general, MNOS
Memory is being used once this saturation value has been reached.

In Fig. 3, even if the source potential is changed, for example, when the source potential Ov and the gate potential are -30V, the change in vth is as follows.
It is shown that when the source potential is -5V, the same result can be obtained by setting the gate potential to -35V.

Experimentally, these relationships have been obtained with good reproducibility. This mechanism cannot be determined in detail, but conventionally, for example, if the source potential is applied to a sufficiently negative level, for example, around -2 OV, the gate is applied with a normal negative voltage (B-a).
In OV, carriers are not ejected to the substrate side, and this is because a depletion layer is formed due to the reverse bias between the source and the substrate.
This is considered to be qualitatively the same as it has been said that the depletion layer prevents carrier emission. The present invention is characterized in that it quantitatively understands this relationship, finds the relationship shown in FIG. 3, and attempts to utilize this relationship.

FIG. 4 shows an embodiment of the present invention. In the above-mentioned MO8) transistor 4 having the MNO8 structure, switches sw, , sw, were provided at the source and gate. Usually G'
, S' are used as nonlinear resistance elements using the wiring method shown in FIG. When you want to change the resistance value, use sw,,s
By selecting G" and S" by w2 and applying an appropriate potential difference to G" and Sl/ according to Fig. 3, it is possible to set an arbitrary vth value. Therefore, it is possible to change the current-voltage characteristics shown in Fig. 1. You can change the characteristics of a brave resistance body.

This can be achieved by using a MOS transistor or the like as sW, , sw.

Although the characteristics in FIG. 3 are described only for a P-channel MNO8 structure MOS transistor, they are for an N-channel.

As already mentioned, the same applies to the MO-8) transistor manufactured by MNoSill. Furthermore, the characteristics shown in Figure 3 are due to the effect of a depletion layer caused by reverse bias between the source and the substrate. It is easy to understand that a memory that utilizes discharging to a memory will have equally similar characteristics.

Further, in this specification, the term MOS transistor is used in accordance with the general terminology, but M in MOS naturally includes not only metals (aluminum, molybdenum, etc.) but also polysilicon, gold silicide, and the like. - Although the general notation is MIS, it is clear from this specification that O is used not only for oxide films, but also for nitride films, nitride films, composite films of oxide films, and metallic layers on oxide films such as floating gates. Generally speaking, it can be said to be an insulating film etc. (general MIS structure).

[Brief explanation of drawings]

Figure 1 is a wiring diagram and characteristic diagram of a resistance element having nonlinear current-voltage characteristics using a MOS transistor.
), (b) is Enno/sment type, Fig. 1 (c)
Figure 2 is a cross-sectional view showing the structure 1' of an electrically replaceable non-volatile memory made of MNO8R. FIG. 3 is a characteristic diagram showing the relationship between the change in vth and the gate-source potential difference when the gate potential in FIG. 2 is made sufficiently negative with respect to the substrate. FIG. 4 is a circuit diagram of one embodiment of the present invention. G...gate, B...substrate, D...drain, SW,, S%...changeover switch, S...source, 4...MNOS) transistor, 1...ultra-thin oxide Film 2..., nitride film.

Claims (2)

[Claims] (1) In a transistor, at least one of the gate electrode, source electrode, and drain electrode is connected to an external terminal, and an electrical A nonvolatile variable resistance element characterized in that the threshold voltage of the MIS transistor can be rewritten to an arbitrary value so that an arbitrary potential difference can be set between the gate electrode and the source electrode with respect to the substrate potential when rewriting the substrate potential. . (2) The nonvolatile variable resistance element according to claim 1, wherein the M-I S transistor is an MNOS transistor.