JPS5893365A - Function trimming method - Google Patents

Function trimming method

Info

Publication number
JPS5893365A
JPS5893365A JP56192516A JP19251681A JPS5893365A JP S5893365 A JPS5893365 A JP S5893365A JP 56192516 A JP56192516 A JP 56192516A JP 19251681 A JP19251681 A JP 19251681A JP S5893365 A JPS5893365 A JP S5893365A
Authority
JP
Japan
Prior art keywords
trimming
resistor
transistor
current
external constant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56192516A
Other languages
Japanese (ja)
Inventor
Yutaka Sada
佐田 裕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56192516A priority Critical patent/JPS5893365A/en
Publication of JPS5893365A publication Critical patent/JPS5893365A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 本発明は、ファンクシ璽ントリミングを行う抵抗を有す
る集積回路装置の抵抗のファン!シ冒ントリミングの方
法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a resistor fan for an integrated circuit device having a resistor that performs funccess trimming! Concerning the method of trimming the screen.

一般に、抵抗値のトリミングを行う場合、抵抗値は低い
値から始めて次第に高くなるようくしかトリミングでき
ない。従って、トリミング用抵抗に外部定電圧源が接続
されておL)!Jミング用の抵抗で回路電流が決まる場
合にファンクシ冒ントリミングを行うと、従来は、トリ
ミング開始からトリミング終了までの間過穴な電流が流
れる為に、ICI破壊したり、過大表温度上昇によって
特性が変化してしまい、この変化を考慮して目標値を設
定する必要があL設定値と目標値との誤差を小さくでき
まい原因とな−)た。
Generally, when trimming the resistance value, the resistance value can only be trimmed starting from a low value and gradually increasing the resistance value. Therefore, an external constant voltage source is connected to the trimming resistor (L)! Conventionally, if you perform funxy impurity trimming when the circuit current is determined by the J trimming resistor, an excessive current flows from the start of trimming to the end of trimming, which may cause ICI destruction or excessive surface temperature rise. The characteristics changed, and it was necessary to set the target value in consideration of this change, which made it impossible to reduce the error between the L setting value and the target value.

−例として第1図を用いて、従来のファンクシ璽ントリ
ミングについて説明する。第1図は、使用時の回路であ
シ、従来のファンクシ璽ントリミングは、トリミングも
使用時と同じ回路で行っていた。従来のトリミング回路
は、外部定電圧源19と、ファンクシ冒ントリミング用
抵抗11と。
- Using FIG. 1 as an example, conventional funk stitch trimming will be explained. FIG. 1 shows the circuit when in use, and in the conventional funxie seal trimming, trimming was performed using the same circuit as when in use. The conventional trimming circuit includes an external constant voltage source 19 and a resistor 11 for trimming the fan.

トランジスタ12.13.14.iL  16および1
7と、負荷18と、プリアンプ回路20からなる。トラ
ンジスタ12とトランジスタ13がカレントミラーにな
っているので、トランジスタ13.14.1り、16お
よび17及び負荷の電流は1例えばトリミング後に抵抗
値が2倍になったとすると、トリミング開始時には使用
時の約2倍の過大電流が流れることになり、チップ温度
・上昇による特性の変化や、ICの破壊の恐れがある。
Transistor 12.13.14. iL 16 and 1
7, a load 18, and a preamplifier circuit 20. Since transistors 12 and 13 are current mirrors, the currents of transistors 13, 16 and 17 and the load are 1. For example, if the resistance value has doubled after trimming, then when trimming starts, the current of transistors 16 and 17 and the load will be 1. Approximately twice as much excessive current will flow, leading to changes in characteristics due to chip temperature rise and risk of IC destruction.

本発明は、このような従来の欠点のないファンクシ冒ン
トリミングの方法を提供することを目的とする。
It is an object of the present invention to provide a method of funk smudge trimming that does not have these conventional drawbacks.

本発明の特徴は、使用時に外部定電圧源が接続される′
ファンクシ冒ントリミング用抵抗を有する集積回路装置
の調整方法において、外部定電流源をトリミング用抵抗
に接続してトリミングを行うファンクシ璽ントリミング
の方法にある。
A feature of the present invention is that an external constant voltage source is connected during use.
A method for adjusting an integrated circuit device having a resistor for trimming includes a method for trimming an integrated circuit device in which trimming is performed by connecting an external constant current source to the resistor for trimming.

例えば、実際の使用時には、外部定電圧源が接続されて
回路電流を決定するトリミング用抵抗端子に、トリミン
グ時だけ外部定電流源を接続して回路電流を制限しつつ
ファンクシ曹ントリミングを行うファンクシ璽ントリミ
ングの方法である。
For example, in actual use, an external constant voltage source is connected to the trimming resistor terminal to determine the circuit current, and an external constant current source is connected only during trimming to limit the circuit current while trimming the circuit current. This is a method of seal trimming.

次に本発明の第1の実施例について図面を参照して説明
する。第2図を参照すると1本発明の第1の実施例は、
外部定電流源31と、この定電流源31に一方の端子が
接続されたトリミング用抵抗21と、この抵抗21の他
方の端子にコレクタ及びペースが接続されエミッタが接
地されたトランジスタ22と、このトランジスタ22の
コレクタ及びペースにペースが接続されエミッタが接地
されたトランジスタ23と、このトランジスタ23のコ
レクタにエミッタが接続されたトランジスタ24及びト
ランジスタ25と、トランジスタ24のコレクタにエミ
ッタが接続され定電圧源29にコレクタが接続されたト
ランジスタ26と、トランジスタ25のコレクタにエミ
ッタが接続され定電圧源29にコレクタが接続されたト
ランジスタ27と、トランジスタ24,25.26及び
27のペース電流を供給するプリアンプ回路30と、一
方の端子がトランジスタ26のエミッfillc接続さ
れ他方の端子がトランジスタ27のエミッタに接続され
た負荷28とを含む。 トランジスタ23のコレクタ電
流は、トランジスタ22とトランジスタ23から構成・
1:、されるカレントミラー回路の働きで、外部定電流
源31によりて決まる。従って、出力アンプを構成する
トランジスタ24゜25.26及び27と負荷28を流
れる出力電流も外部定電流源31によ〕決まる。
Next, a first embodiment of the present invention will be described with reference to the drawings. Referring to FIG. 2, the first embodiment of the present invention is as follows:
An external constant current source 31, a trimming resistor 21 whose one terminal is connected to the constant current source 31, a transistor 22 whose collector and pace are connected to the other terminal of this resistor 21 and whose emitter is grounded; A transistor 23 whose pace is connected to the collector and pace of the transistor 22 and whose emitter is grounded, a transistor 24 and a transistor 25 whose emitters are connected to the collector of the transistor 23, and a constant voltage source whose emitter is connected to the collector of the transistor 24. a transistor 26 whose collector is connected to the transistor 29; a transistor 27 whose emitter is connected to the collector of the transistor 25 and whose collector is connected to the constant voltage source 29; and a preamplifier circuit that supplies pace currents to the transistors 24, 25, 26, and 27. 30, and a load 28 having one terminal connected to the emitter of transistor 26 and the other terminal connected to the emitter of transistor 27. The collector current of the transistor 23 is composed of the transistor 22 and the transistor 23.
1: is determined by the external constant current source 31 due to the function of the current mirror circuit. Therefore, the output current flowing through the transistors 24, 25, 26 and 27 and the load 28 constituting the output amplifier is also determined by the external constant current source 31.

次に、第3図のグラフを用いて本発明の効果を示す0本
実施例において、ファンクシ冒ントリミングの目標を、
負荷28に流れる出力電流tある目標値IIK設定する
こととしよう。外部定電流源31の定電流を増加させて
いくと、それに伴なって出力電流も増加し、やがて目標
値IIK達する(第3図のA点)。次に定電流源31の
定電流を一定にして、0点(第2図)の電圧を観測しつ
つ、抵抗21のトリミングを開始する。0点の電圧が使
用時の外部定電圧源の電圧VIK達した所でファンクシ
冒ントリミングが終了する(第3図のB点)。
Next, in this example, which shows the effect of the present invention using the graph of FIG.
Assume that the output current t flowing through the load 28 is set to a certain target value IIK. As the constant current of the external constant current source 31 is increased, the output current also increases and eventually reaches the target value IIK (point A in FIG. 3). Next, trimming of the resistor 21 is started while keeping the constant current of the constant current source 31 constant and observing the voltage at the 0 point (FIG. 2). Fancy trimming ends when the voltage at point 0 reaches the voltage VIK of the external constant voltage source during use (point B in FIG. 3).

以上説明し友ように1本実施例では、トリミングの開始
から終了まで、過大な電流は流れない。
As explained above, in this embodiment, no excessive current flows from the start to the end of trimming.

次に本発明の第2の実施例について図面を参照して説明
する。第4図(匂を参照すると1本発明の第2の実施例
は、外部定電圧源51と、この電圧源51に接続された
抵抗52と、この抵抗52にエミッタが接続されペース
及びコレクタが定電流源54に接続されたトランジスタ
53と、定電流源54と、トランジスタ530ベースに
ペースが接続されたトランジスタ56と、このトランジ
スタ56のエミッタに接続されたファンクシ璽ントリミ
ング用の抵抗55と、この抵抗55に接続された外部定
電流源58と、トランジスタ56のコレクタに接続され
友残シの部分の回路57とを含む、第4図(1)は、従
来のファンクシ曹ントリミングの回路で1例えばファン
クシ璽ントリミング用の抵抗45のトリミング前の抵抗
値が、トリミング後の抵抗値の中介とすると、トリミン
グ開始時のトランジスタ46のコレクタ電流は使用時の
それの約2倍となる。一方、本発明の第2の実施例であ
る第4図の(2)では、ファンクシ嘗ントリミングの目
的たる測定項目を測定しクク、外部定電流源58の電流
を増加させる。測定データが設定値に違したところで、
電流源O値を一定にして、D点の電圧を測定しつつ、抵
抗のトリミングを開始する。D点の電圧が使用時の外部
定電圧源の電圧に達しtところでファンクシ冒ントリミ
ングを終了する。
Next, a second embodiment of the present invention will be described with reference to the drawings. The second embodiment of the present invention consists of an external constant voltage source 51, a resistor 52 connected to the voltage source 51, and an emitter connected to the resistor 52 to connect the pace and collector. A transistor 53 connected to a constant current source 54, a constant current source 54, a transistor 56 connected to the base of the transistor 530, and a resistor 55 for function trimming connected to the emitter of the transistor 56. FIG. 4(1) shows a conventional funxion trimming circuit, which includes an external constant current source 58 connected to the resistor 55 and a circuit 57 connected to the collector of the transistor 56. 1. For example, if the resistance value before trimming of the resistor 45 for functional trimming is the intermediate value of the resistance value after trimming, the collector current of the transistor 46 at the start of trimming will be approximately twice that during use. In (2) of FIG. 4, which is the second embodiment of the present invention, the measurement item that is the purpose of funk trimming is measured, and the current of the external constant current source 58 is increased.The measurement data is the set value. In contrast,
While keeping the current source O value constant and measuring the voltage at point D, trimming of the resistor is started. When the voltage at point D reaches the voltage of the external constant voltage source during use, the funxy impurity trimming ends.

本実施例でも、トリミング実施中に回路には使用時を上
まわる過大電流は流れない。
Also in this embodiment, an excessive current exceeding that during use does not flow through the circuit during trimming.

本発明は以上説明したように1使用時に外部定電圧源が
接続されるファンクシ冒ントリミング用抵抗に、トリミ
ング時には外部定電流源を接続することによシ、トリミ
ング時に過大電流が流れるのを紡ぐ効果がある。
As explained above, the present invention prevents excessive current from flowing during trimming by connecting an external constant current source during trimming to the funxion trimming resistor to which an external constant voltage source is connected when in use. effective.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のファンクシ冒ントリミングの回路図、第
2図は本発明の第1の実施例の回路図。 第3図は本発明の第1の実施例のトリミング時の入力定
電流、出力電流、入力電圧の変化を示すグラフ、第4図
(2)は本発明の第2の実施例の回路図。 第4図(1)はその従来のファンクシ冒ントリミングの
回路図である。 なお図において、21・・・・・・トリミング用抵抗、
31・・・・・・外部定電流源、55・・・・・・トリ
ミング用抵抗、5B・・・・・・外部定電流源、である
。 卒l圀 誉2聞
FIG. 1 is a circuit diagram of a conventional funxy font trimming system, and FIG. 2 is a circuit diagram of a first embodiment of the present invention. FIG. 3 is a graph showing changes in constant input current, output current, and input voltage during trimming in the first embodiment of the present invention, and FIG. 4 (2) is a circuit diagram of the second embodiment of the present invention. FIG. 4(1) is a circuit diagram of the conventional funxy smudge trimming. In the figure, 21...trimming resistor,
31...external constant current source, 55...trimming resistor, 5B...external constant current source. Graduation degree 2nd grade

Claims (1)

【特許請求の範囲】[Claims] 使用時に外部定電圧源が接続されるファンクシ冒ントリ
ミング用抵抗を有する集積回路装置の調整方法において
、外部定電流源ヲトリミング用抵抗に接続してトリミン
グを行うことを特徴とするファンクシ璽ントリミングの
方法。
A method for adjusting an integrated circuit device having a resistor for trimming a resistor to which an external constant voltage source is connected during use, characterized in that trimming is performed by connecting the external constant current source to the resistor for trimming. the method of.
JP56192516A 1981-11-30 1981-11-30 Function trimming method Pending JPS5893365A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56192516A JPS5893365A (en) 1981-11-30 1981-11-30 Function trimming method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56192516A JPS5893365A (en) 1981-11-30 1981-11-30 Function trimming method

Publications (1)

Publication Number Publication Date
JPS5893365A true JPS5893365A (en) 1983-06-03

Family

ID=16292579

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56192516A Pending JPS5893365A (en) 1981-11-30 1981-11-30 Function trimming method

Country Status (1)

Country Link
JP (1) JPS5893365A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6079976A (en) * 1983-10-07 1985-05-07 Fuji Xerox Co Ltd Thick film type thermal recording head
JPS60192666A (en) * 1984-03-13 1985-10-01 Mitsubishi Electric Corp Thermal head

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6079976A (en) * 1983-10-07 1985-05-07 Fuji Xerox Co Ltd Thick film type thermal recording head
JPS60192666A (en) * 1984-03-13 1985-10-01 Mitsubishi Electric Corp Thermal head

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