JPS5897765A - Common bus system for multi-processor system - Google Patents

Abstract

PURPOSE:To enable to execute the communication between processors, and diagnosis of the processor, test and initial program loading of the processor respectively, without giving any effect to a job of on-line, by performing the above-mentioned jobs independently of each other via plural buses. CONSTITUTION:If a processor CPi has a fault, a processor SMPU performs the communication, diagnosis and test for the CPi by means of a common bus 2. When a fault is decided from the results of the diagnosis and test, the CPi is cut off from the common buses 1 and 2, and repaired. Then the initial program loading is performed by the SMPU via the bus 2, and the CPi is set in a start waiting state. Meanwhile, other processors continue the communication via the bus 2. Thus the system has no breakdown at all.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a coupling scheme between processors in a multiprocessor system, particularly to a common bus scheme.

Conventionally, a single bus method has been used as a common bus method for connecting processors in a multi-processor sensor system. FIG. 1 shows an example of such a conventional common bus system. In the figure, 1 indicates a common bus,
, C20,...CPn is the processor, SMP
U is a processor that performs diagnosis/testing and initial program loading.

In the multi-processor sensor system in FIG. 1, communication between processors 7 is performed using a common bus 1.

At this time, each processor cp,.

C20,..., CPn, for example, processor-cp, fails, and when performing diagnosis/testing between the failed processor CP1 and the diagnostic/test processor SMPU, the inter-processor communication The common bus 1 was used for diagnosis, testing, and initial program loading. However, in this case, the faulty processor CP1 and the diagnostic/test processor SM
When performing diagnostic/test communication between PUs, it may have a negative impact on common bus 1, resulting in a system down.Furthermore, when recovering a failed processor CP and performing initial program loading, common bus 1 may be By revising , normal inter-processor communication may not be possible during that time, and if the common bus 1 fails, the system will go down.

An object of the present invention is to eliminate the drawbacks of the common bus method of the conventional multi-processor sensor system, and to improve communication between processors, system diagnosis and testing, and initial program loading of processors without affecting communication between processors. The objective is to provide a common bus system that can be used without any

FIG. 2 is a simplified block diagram of a common bus scheme for a multiprocessor system in one embodiment of the present invention. In the figure, 1 and 2 are common buses, CP,
, CP2. , , , CPi , CPn is a processor, and SMPU is a processor that performs diagnosis/testing and initial program loading.

Next, the embodiment shown in FIG. 2 will be described.

In FIG. 2, Prosensor CP1. CP2. ...
CP engineer.

...CPn uses the common bus 1 as the active bus to perform inter-processor communication. Now, when an abnormality occurs in the processor CPi, the processor SMPH JP-A-58-97765 (2) communicates with the processor CPi using the common bus 2 and performs diagnosis and testing. At this time, the common bus 1 is not affected in any way. Diagnosis/tests include a response confirmation test, a RUN confirmation test, a memory sum check test, etc. If it is determined that there is an abnormality as a result of the diagnosis/test,
Prosensor CPi uses common bus 1. O fire, be cut off,
It is repaired and after repair is reconnected to the common bus 1.2.

Thereafter, initial program loading is performed by the processor SMPH using the common bus 2,
The processor 〇Pi is in a state of waiting for startup. after that,
The above-mentioned diagnosis and test is performed again with the processor SMPU, and if a normal response is made, the processor CPi
is started upon receiving a start command from the processor SMPU, participates in the multiprocessor system as an online broker, and executes jobs.

Processors CP, CP2. ... continues to communicate over common bus 1, and the system will not go down. If common bus 1 still fails, each processor cp1. cp2. . . . CPn detects a failure and automatically switches from common/bus 1 to common bus 2 as the communication bus, and also performs communication using common bus 2.

As explained above, the present invention provides for
By independently performing communication, processor diagnosis/testing, and initial program loading, it becomes possible to execute processor diagnosis/testing and initial program loading without affecting online jobs. Furthermore, when the communication system used for communication malfunctions, it can be used for diagnosis, testing, and initial reference.

Please remove the node used for program loading.

By using the bus for communication between sensors, the system will not go down due to a common bus failure, and a reliable multiprocessor system will be constructed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a common bus system of a conventional multiprocessor system, and FIG. 2 is a block diagram showing a common bus system of a multiprocessor sensor system according to the present invention. 1.2...Common lotus, CPl, CP2.・・・
・CPn...00. Processor, SMPU...
・Processor O for diagnosis/testing and initial program rope ink

Claims (1)

[Claims] (1) Consisting of a plurality of processors, each processor is interconnected by a first common bus and a second common bus, communication between the processors is performed by the first common bus, and a second common bus A common HAS method for multiprocessor systems that is characterized by diagnosing and testing processors and performing initial program loading.