JPS5897771A - Subtracting circuit - Google Patents

Abstract

PURPOSE:To decrease the number of elements to facilitate the integration as well as to increase the accuracy, by using a current mirror circuit without applying an operational amplifier. CONSTITUTION:The voltages V1 and V2 are applied to the bases of the 1st and 2nd input transistors (TRs) 9 and 10 from the 1st and 2nd variable voltage sources 1 and 2 respectively. A current I1=(V1-V2)/R1 flows to the TR 9 and TR 10. At the same time, a current I1 is supplied to the collector side of a TR 11 which forms a pnp current mirror circuit, and a current AI1 is supplied to the collector side of a TR 12 of the other side. In addition, a current AI1 flows to the collector side of a TR 14 forming an npn current mirror circuit, and a current ABI1 flows to the collector side of a TR 13 of the other side. Then the voltage V0=I1XR2=R2(V1-V2)/R1 is led out of a load resistance 5 at the collector side of a TR 15.

Description

[Detailed description of the invention] The present invention relates to a subtraction circuit.

Figure 1 shows a conventional subtraction circuit. In the figure, (1)
, (2) is a variable constant voltage source for applying mutually varying input voltages vl, v, and (3) is an operational amplifier.

(4) consists of one variable constant voltage source (1) and an operational amplifier (3).
), (5) is a resistor with a resistance value R1 connected between the above input terminal and the ground, (6) is the other variable resistor. Constant voltage source (
2) is a resistor with a resistance value R connected between the above-mentioned negative input terminal of the operational amplifier (3), and (7) is a resistor with a resistance value R connected between the above-mentioned negative input terminal and output terminal. , (8) are the output terminals of the operational amplifier (3).

In the above configuration, when R1==RQ, R,=R;, the electric current 1):Vo generated at the output terminal (8) is expressed by the following formula (
1).

Not only does it take a lot of work, but the input impedance is a resistor (1
), (2) is limited by the added resistance value (R1+Rs) and has various drawbacks, such as the difference between the resistance value R1 and the resistance value Rr, and the difference between the resistance value R1 and the resistance value R2, which becomes an error factor. .

The present invention was made in order to eliminate the above-mentioned drawbacks, and an object of the present invention is to provide a high-precision subtraction circuit with a very simple configuration using an operational amplifier.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows an example of a subtraction circuit according to the present invention, and the same parts as in FIG. 1 are given the same reference numerals and the explanation thereof will be omitted. In the same figure, %(9) and α are the first and second input transistors to which voltages v1 and (2) of the first and second variable constant voltage sources (1) and (2) are applied, respectively. ),
(b) is a pair of transistors constituting a PNP current mirror circuit), both of which are Oυ, the collector area ratio of (b) is set to 1:A, and the first transistor (b) is set to 1:A.
The collector of transistor (9) is connected to the collector of transistor (9). (b) and (b) are a pair of transistors that constitute an MX'M current mirror circuit, both of which are 0
3), the emitter area in) is set to B:1,
The collector of the transistor (7) and the collector of the transistor Q are connected to each other, and the transistor α
The emitter and collector of the above transistor (to) are connected to the rumored emitter. The above transistor (9),
A first resistor (4
) i: x is inserted. (b) is a PIP for taking out the calculated power of σ1), which is a transistor with a resistance value R2
A load resistor (5) is connected to the collector of the transistor (15). (16), 07) are transistors and resistors that constitute the starting circuit, and (b)) is a constant voltage source.

In the above configuration, the first and second variable constant voltage sources (1
), (2), voltages vl and v, respectively, are applied to each pace of the first and second input transistors (9), α0), respectively, and each transistor (9), 1l
Assume that the current l of equation (2) below flows through lo) (however,
(ignoring base-emitter forward voltage).

Assuming that the direct current in equation (2) above flows to the input transistor (9), α@, the transistor (1) that constitutes the PNP current mirror circuit (1) is connected to the collector side of the other transistor (2). A current flows into the collector side of the other transistor (B), and a current flows into the collector side of the other transistor (B). . However, it is assumed that the current amplification factors of transistors (b) to (2) are sufficiently high and the effect of the base current can be ignored.

Here, if the area ratio of each is set so that A-B=2, the emitter current of the transistor (9) (which is equal to the collector current) is the constant current of the transistor uO) selected by In the transistor (to) which is the load,
As explained above, since 2×1 flows out, the emitter current of the transistor αΦ is 2××1=×1, and the emitter current of each transistor (9) and ■ can be set equal to×1. .

vl and v in the second equation can be arbitrarily selected (vl
)v.

(range) holds true, so each emitter current of transistors (9) and (to) follows the magnitude of the input voltage difference vl-v, and becomes equal to each other.

While transistors (9) and (g) operate in the active region, each emitter current is equal to
Strict expression of the above equation (2) is as shown in equation (3), where 1Ml>V! , Vz>Vn! es+ 0.3v,
Vnzc) Base-emitter forward voltage of transistor (9) % VB'lD2 is the base-emitter forward voltage of transistor αΦ.

The second term in equation (3) above can be almost ignored as follows.

However, engineering S1. Engineering S! are transistors (9), (11
) with the reverse saturation current, more l # engineering S! becomes. k is Boltzmann's constant, T is absolute temperature, and q is electric charge.

Therefore, the above formula (3) and the above formula (2) have the same value and can be regarded as the same formula, and the current flow l is calculated by the following formula (4
) can be defined as an expression.

(transistor)], if a large number of the above-mentioned currents 1 are applied, the output voltage vo generated across the load resistor (5) is as follows:
As a result, a highly accurate subtraction circuit can be constructed. In particular, since no operational amplifier is used, the number of elements is small, and the current factor l in equation (4) above is sufficient to have a small value on the order of several tens of micrometers in the electronic circuit. Impedance can be increased. Furthermore, since the input voltage potential difference can be converted into a current with high precision, it can also be used as a high precision voltage-current conversion circuit.

FIG. 3 is an electric circuit diagram showing another embodiment of the present invention, and differs from FIG. 2 only in the number of outputs.
If the output terminal (8) is connected to the connection point between the NPIJ) Rungis #- and the resistor (5), the same effect as in FIG. 2 is obtained.

FIG. 4 is an electric circuit diagram showing still another embodiment of the present invention, in which the transistor (9) shown in FIG. 2 and the complementary mo configuration IJPx:pNp:6! If it is reversed, the operation and effect are the same as 1 in Fig. 2.

As described above, since the subtraction circuit according to the present invention is constructed using a current mirror circuit without introducing an operational amplifier, it has a small number of elements, is easy to integrate, and has a high morning rate. It has the effect of

[Brief explanation of drawings]

Figure 1 is an electrical circuit diagram showing a conventional subtraction circuit; Figures 2-
FIG. 4 is an electrical circuit diagram showing a different example of the subtraction circuit according to the present invention. (1), (2)...Variable constant voltage source, (4)...Resistor, (5)...Load resistor, (8)...Output terminal, (9), αΦ, - 8 wheels...input transistor, (
9), (b), υ, (to)...Transistor of the first current mirror circuit, (to), (2), KN...2nd
Current mirror circuit transistor, (b), ■, member...output transistor, (e)...constant voltage source. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. Agent Makoto Kuzuno (1 other person) Figure 1 Figure 2

Claims (1)

[Claims] (1) A resistor is connected between the emitters of a pair of input transistors to which mutually different input voltages are applied, and the collector and base of one of the pair of transistors of the same conductivity type. The conductivity types of the first and second current mirror circuits, which are configured as diodes by short-circuiting them, are different from each other, and the diode of one of the current mirror circuits is connected to the collector of one of the input transistors. The collector ratio of the other transistor in the circuit is set to an arbitrary ratio, and the transistor of the other current mirror circuit connected to the emitter of the other transistor of the input transistors is connected to the diode of the circuit. Each emitter ratio is set to an arbitrary ratio B:1, and the collectors of transistors in one current mirror circuit with different collector ratios are connected to the collectors of diode-configured transistors in the other current mirror circuit with different emitter ratios. At the same time, the product (mu B) of the collector area ratio in one current mirror circuit and the emitter area ratio in the other current mirror circuit is set to 2, and the transistors in one current mirror circuit have different collector area ratios. A series body consisting of an output transistor whose base is connected to the base of the load resistor and a load resistor is connected in series to a constant voltage source, and an output terminal is connected to a connection point between the output transistor and the load resistor. Subtraction circuit.